diff options
| author | Rex Zhu <Rex.Zhu@amd.com> | 2018-03-07 13:32:45 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-03-15 09:56:11 -0500 |
| commit | 7f8e66b60342f2dbefb86ce4d5a65e47b4acf70d (patch) | |
| tree | a4e51aa3c8197d65ec9cc7dade1f5e07b9abe04c /drivers | |
| parent | 847e82615bce500e85480b55967c0159cedcb00e (diff) | |
drm/amd/pp: Delete is_smc_ram_running function on RV
1. There is a race condition when another ip also use same register pairs
2. check once at boot up by GetDriverIfVersion message is sufficient
to check SMU health. so delete is_smc_ram_running check.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c | 27 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.h | 1 |
2 files changed, 0 insertions, 28 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c index ac3350af9374..68cfb999521a 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c @@ -47,34 +47,10 @@ #define smnMP1_FIRMWARE_FLAGS 0x3010028 -bool rv_is_smc_ram_running(struct pp_hwmgr *hwmgr) -{ - uint32_t mp1_fw_flags, reg; - - reg = soc15_get_register_offset(NBIF_HWID, 0, - mmPCIE_INDEX2_BASE_IDX, mmPCIE_INDEX2); - - cgs_write_register(hwmgr->device, reg, - (MP1_Public | (smnMP1_FIRMWARE_FLAGS & 0xffffffff))); - - reg = soc15_get_register_offset(NBIF_HWID, 0, - mmPCIE_DATA2_BASE_IDX, mmPCIE_DATA2); - - mp1_fw_flags = cgs_read_register(hwmgr->device, reg); - - if (mp1_fw_flags & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) - return true; - - return false; -} - static uint32_t rv_wait_for_response(struct pp_hwmgr *hwmgr) { uint32_t reg; - if (!rv_is_smc_ram_running(hwmgr)) - return -EINVAL; - reg = soc15_get_register_offset(MP1_HWID, 0, mmMP1_SMN_C2PMSG_90_BASE_IDX, mmMP1_SMN_C2PMSG_90); @@ -89,9 +65,6 @@ int rv_send_msg_to_smc_without_waiting(struct pp_hwmgr *hwmgr, { uint32_t reg; - if (!rv_is_smc_ram_running(hwmgr)) - return -EINVAL; - reg = soc15_get_register_offset(MP1_HWID, 0, mmMP1_SMN_C2PMSG_66_BASE_IDX, mmMP1_SMN_C2PMSG_66); cgs_write_register(hwmgr->device, reg, msg); diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.h b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.h index 0ff4ac5838f7..401265cb548a 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.h +++ b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.h @@ -51,7 +51,6 @@ struct rv_smumgr { }; int rv_read_arg_from_smc(struct pp_hwmgr *hwmgr, uint32_t *arg); -bool rv_is_smc_ram_running(struct pp_hwmgr *hwmgr); int rv_copy_table_from_smc(struct pp_hwmgr *hwmgr, uint8_t *table, int16_t table_id); int rv_copy_table_to_smc(struct pp_hwmgr *hwmgr, |