diff options
| author | Alvin Lee <alvin.lee2@amd.com> | 2020-10-16 12:20:57 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-11-02 15:30:05 -0500 |
| commit | 6f2239ccdfc04938dc35e67dd60191b2c05dfb63 (patch) | |
| tree | cd764477ad249b29290373587e0cd4db512ebe61 /drivers | |
| parent | 685b4d8142dcbf11b817f74c2bc5b94eca7ee7f2 (diff) | |
drm/amd/display: Keep GSL for full updates with planes that flip VSYNC
[Why]
When enabling PIP in Heaven, the PIP planes are VSYNC
flip and is also the top-most pipe. In this case GSL
will be disabled because we only check immediate flip
for the top pipe. However, the desktop planes are still
flip immediate so we should at least keep GSL on until
the full update.
[How]
Check each pipe in the tree to see if any planes
are flip immediate. Maintain the GSL lock if yes,
and take it down after when unlocking if any planes
are flipping VSYNC. Keeping GSL on with VSYNC +
flip immediate planes causes corruption.
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index 71499c131947..3b26396cbc5c 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -1158,6 +1158,7 @@ void dcn20_pipe_control_lock( struct pipe_ctx *pipe, bool lock) { + struct pipe_ctx *temp_pipe; bool flip_immediate = false; /* use TG master update lock to lock everything on the TG @@ -1169,6 +1170,13 @@ void dcn20_pipe_control_lock( if (pipe->plane_state != NULL) flip_immediate = pipe->plane_state->flip_immediate; + temp_pipe = pipe->bottom_pipe; + while (!flip_immediate && temp_pipe) { + if (temp_pipe->plane_state != NULL) + flip_immediate = temp_pipe->plane_state->flip_immediate; + temp_pipe = temp_pipe->bottom_pipe; + } + if (flip_immediate && lock) { const int TIMEOUT_FOR_FLIP_PENDING = 100000; int i; @@ -1196,6 +1204,17 @@ void dcn20_pipe_control_lock( (!flip_immediate && pipe->stream_res.gsl_group > 0)) dcn20_setup_gsl_group_as_lock(dc, pipe, flip_immediate); + temp_pipe = pipe->bottom_pipe; + while (flip_immediate && temp_pipe) { + if (temp_pipe->plane_state != NULL) + flip_immediate = temp_pipe->plane_state->flip_immediate; + temp_pipe = temp_pipe->bottom_pipe; + } + + if (!lock && pipe->stream_res.gsl_group > 0 && pipe->plane_state && + !flip_immediate) + dcn20_setup_gsl_group_as_lock(dc, pipe, false); + if (pipe->stream && should_use_dmub_lock(pipe->stream->link)) { union dmub_hw_lock_flags hw_locks = { 0 }; struct dmub_hw_lock_inst_flags inst_flags = { 0 }; |