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authorLucas Stach <l.stach@pengutronix.de>2018-04-11 17:27:41 +0200
committerThierry Reding <treding@nvidia.com>2018-05-18 12:53:35 +0200
commit2554f154b46f7d8a933f0616e8170bf4d970a2bf (patch)
treeffb99368ba7956ed967b0b3a9772aae31e24a0be /drivers
parentda50bd4258db62810de4e0f3d75cf7d3d67466b1 (diff)
drm/panel: simple: AUO P320HVN03 uses SPWG data ordering
The patch adding support for the AUO P320HVN03 panel was written against a preliminary datasheet, which specified JEIDA data ordering. Testing with real hardware has shown that the actually used data ordering is SPWG. Fixes: 70c0d5b783f5 (drm/panel: simple: add support for AUO P320HVN03) Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180411152741.22483-1-l.stach@pengutronix.de
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/panel/panel-simple.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 2209aeddae3c..ba2631a7de0b 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -686,7 +686,7 @@ static const struct panel_desc auo_p320hvn03 = {
.enable = 450,
.unprepare = 500,
},
- .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA,
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
};
static const struct drm_display_mode auo_t215hvn01_mode = {