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authorYogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>2019-08-02 10:52:49 +0530
committerAlex Deucher <alexander.deucher@amd.com>2019-08-23 11:42:18 -0500
commit1e7f100ce8c0640634b794604880d9204480c9f1 (patch)
treee2271a7cb95c11ed948784fbec298f3bf555e960 /drivers
parent436d96357fa956c4723b3400d88ae47cb0e2f4cd (diff)
drm/amd/display: fix trigger not generated for freesync
[Why] In newer hardware MANUAL_FLOW_CONTROL is not a trigger bit. Due to this front porch is fixed and in these hardware freesync does not work. [How] Change the programming to generate a pulse so that the event will be triggered, front porch will be cut short and freesync will work. Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
index e5e5be63032b..e98e6bab4808 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
@@ -825,6 +825,9 @@ void optc1_program_manual_trigger(struct timing_generator *optc)
REG_SET(OTG_MANUAL_FLOW_CONTROL, 0,
MANUAL_FLOW_CONTROL, 1);
+
+ REG_SET(OTG_MANUAL_FLOW_CONTROL, 0,
+ MANUAL_FLOW_CONTROL, 0);
}