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authorOng Boon Leong <boon.leong.ong@intel.com>2021-04-21 16:46:06 +0800
committerDavid S. Miller <davem@davemloft.net>2021-04-21 10:49:02 -0700
commit17cb00704c217d88a93791c914a01904e685b499 (patch)
treee9ab03250f4785bd4f9dba8f60a9645eb58bd67f /drivers
parent70a7c484c7c3eaa17b679db2c74ec8ecbe8dc0e8 (diff)
stmmac: intel: set TSO/TBS TX Queues default settings
TSO and TBS cannot coexist, for now we set Intel mGbE controller to use below TX Queue mapping: TxQ0 uses TSO and the rest of TXQs supports TBS. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
index bd662aaf664a..4bd038acb1b9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
@@ -447,6 +447,9 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,
/* Disable Priority config by default */
plat->tx_queues_cfg[i].use_prio = false;
+ /* Default TX Q0 to use TSO and rest TXQ for TBS */
+ if (i > 0)
+ plat->tx_queues_cfg[i].tbs_en = 1;
}
/* FIFO size is 4096 bytes for 1 tx/rx queue */