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authorGustavo A. R. Silva <gustavo@embeddedor.com>2018-07-04 09:22:55 -0500
committerEric Anholt <eric@anholt.net>2018-07-17 11:25:18 -0700
commit108019a7e6a34df91246365066bea7cf6faf6b02 (patch)
tree959d23a0cf451dcc61a5d0a1381911c68adb8902 /drivers
parentf9760772d26560ec137fb1c768487c601b93dbc3 (diff)
drm/pl111: Use 64-bit arithmetic instead of 32-bit
Add suffix ULL to constant 1000 in order to give the compiler complete information about the proper arithmetic to use. Notice that such constant is used in a context that expects an expression of type u64 (64 bits, unsigned) and the following expression is currently being evaluated using 32-bit arithmetic: mode->clock * 1000 Addresses-Coverity-ID: 1466139 ("Unintentional integer overflow") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20180704142255.GA8614@embeddedor.com
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/pl111/pl111_display.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c
index a432eb7ad445..754f6b25f265 100644
--- a/drivers/gpu/drm/pl111/pl111_display.c
+++ b/drivers/gpu/drm/pl111/pl111_display.c
@@ -63,7 +63,7 @@ pl111_mode_valid(struct drm_crtc *crtc,
* We use the pixelclock to also account for interlaced modes, the
* resulting bandwidth is in bytes per second.
*/
- bw = mode->clock * 1000; /* In Hz */
+ bw = mode->clock * 1000ULL; /* In Hz */
bw = bw * mode->hdisplay * mode->vdisplay * cpp;
bw = div_u64(bw, mode->htotal * mode->vtotal);