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authorLe Ma <le.ma@amd.com>2019-12-19 19:26:02 +0800
committerAlex Deucher <alexander.deucher@amd.com>2019-12-23 14:56:09 -0500
commit0a96afc7c56cbac075426a6a5f82a88cadb648f7 (patch)
tree46b2a0717ff0088f145404562b88bfefaacb2d85 /drivers
parenta7843c03794553ffe974760e8ba0a6bffbc94d41 (diff)
drm/amdgpu: fix ctx init failure for asics without gfx ring
This workaround does not affect other asics because amdgpu only need expose one gfx sched to user for now. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Nirmoy Das <nirmoy.das@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 63f6365312d5..64e2babbc36e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -127,7 +127,8 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
switch (i) {
case AMDGPU_HW_IP_GFX:
- scheds = adev->gfx.gfx_sched;
+ sched = &adev->gfx.gfx_ring[0].sched;
+ scheds = &sched;
num_scheds = 1;
break;
case AMDGPU_HW_IP_COMPUTE: