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authorRicardo Neri <ricardo.neri@ti.com>2012-01-19 12:21:41 -0600
committerTomi Valkeinen <tomi.valkeinen@ti.com>2012-01-25 13:48:34 +0200
commit1149c74419179d57fdcd506424da2444755e65d9 (patch)
tree0bb48aa33cc2ae575a144cfbee8fa7f66577fb50 /drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
parent9e4ed603e6ec71da9e0a7484a694f98dff869068 (diff)
OMAPDSS: HDMI: Correct source of the pixel clock in ACR calculation
Due to changes in struct hdmi_config, the pixel clock has to be obtained differently. The pixel clock is needed to calculate the CTS value as defined in the HDMI specification. Signed-off-by: Ricardo Neri <ricardo.neri@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c')
-rw-r--r--drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
index a229ae71be79..9bbf9614fe0a 100644
--- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
+++ b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
@@ -1137,7 +1137,7 @@ int hdmi_config_audio_acr(struct hdmi_ip_data *ip_data,
{
u32 r;
u32 deep_color = 0;
- u32 pclk = ip_data->cfg.timings.timings.pixel_clock;
+ u32 pclk = ip_data->cfg.timings.pixel_clock;
if (n == NULL || cts == NULL)
return -EINVAL;