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author | Alex Williamson <alex.williamson@redhat.com> | 2015-01-13 11:26:50 -0700 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2015-01-23 15:44:45 -0600 |
commit | d3d2ab43ddae5f958461ac0a9a2b484a68194df5 (patch) | |
tree | 60910830d853171b5511653903c53559b9ba768d /drivers/uwb/umc-drv.c | |
parent | 6a3763d1734bf133330dc8e246bf794b9e360e8a (diff) |
PCI: Add DMA alias quirk for Adaptec 3405
The Adaptec 3405 is actually an Intel 80333 I/O processor where the exposed
device at 0e.0 is actually the address translation unit of the I/O
processor and a hidden, private device at 01.0 masters the DMA for the
device. Create a fixed alias between the exposed and hidden devfn so we
can enable the IOMMU.
Scenarios like this are potentially likely for any device incorporating
this I/O processor, so this little bit of abstraction with the fixed alias
table should make future additions trivial.
Without this fix, booting a system with the Intel IOMMU enabled and an
Adaptec 3405 at 02:0e.0 results in a flood of errors like this:
dmar: DRHD: handling fault status reg 3
dmar: DMAR:[DMA Write] Request device [02:01.0] fault addr ffbff000
DMAR:[fault reason 02] Present bit in context entry is clear
[bhelgaas: changelog, comment]
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Adaptec OEM Raid Solutions <aacraid@adaptec.com>
Diffstat (limited to 'drivers/uwb/umc-drv.c')
0 files changed, 0 insertions, 0 deletions