diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2017-05-23 10:44:05 +1000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-05-25 14:30:13 +0200 |
| commit | 4642d34a439f80e16af0d56ed6258a33abae257a (patch) | |
| tree | 36d0c3bfe6b4dcbff4501be26c5079eb1457e3fb /drivers/usb/host/uhci-hcd.c | |
| parent | 6acf116c9558314d3cac36d5eb17f30368c73fd2 (diff) | |
usb/uhci: Add support for Aspeed BMC SoCs
The Aspeed 2400/2500 families have a variant of UHCI which requires
some quirks to the driver to work:
- The register offsets are different. We add a remapping helper.
- All accesses have to be done via 32-bit loads and stores. We
force all accessors to use readl/writel. This is of no consequence
for reads as we never read "in the middle" of a register. For writes
it also works fine as the registers only actually implement the bits
we try to write (16-bit for the registers accessed with writew and
8-bit for the register accessed with writeb), so always using a
32-bit write will have no negative effect. We never do partial writes.
- The resume detect interrupt is broken
- The number of ports is (optionally) provided via the device-tree
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
--
v2. Remove the bulk of the #ifdef's
drivers/usb/host/Kconfig | 6 ++++-
drivers/usb/host/uhci-hcd.c | 17 +++++++++++---
drivers/usb/host/uhci-hcd.h | 51 ++++++++++++++++++++++++++++++++++++++++
drivers/usb/host/uhci-platform.c | 22 ++++++++++++++++-
4 files changed, 91 insertions(+), 5 deletions(-)
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/host/uhci-hcd.c')
| -rw-r--r-- | drivers/usb/host/uhci-hcd.c | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c index 94b150196d4f..c3267a78c94e 100644 --- a/drivers/usb/host/uhci-hcd.c +++ b/drivers/usb/host/uhci-hcd.c @@ -265,9 +265,13 @@ static void configure_hc(struct uhci_hcd *uhci) static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci) { - /* If we have to ignore overcurrent events then almost by definition - * we can't depend on resume-detect interrupts. */ - if (ignore_oc) + /* + * If we have to ignore overcurrent events then almost by definition + * we can't depend on resume-detect interrupts. + * + * Those interrupts also don't seem to work on ASpeed SoCs. + */ + if (ignore_oc || uhci_is_aspeed(uhci)) return 1; return uhci->resume_detect_interrupts_are_broken ? @@ -384,6 +388,13 @@ static void start_rh(struct uhci_hcd *uhci) { uhci->is_stopped = 0; + /* + * Clear stale status bits on Aspeed as we get a stale HCH + * which causes problems later on + */ + if (uhci_is_aspeed(uhci)) + uhci_writew(uhci, uhci_readw(uhci, USBSTS), USBSTS); + /* Mark it configured and running with a 64-byte max packet. * All interrupts are enabled, even though RESUME won't do anything. */ |