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authorVivek Gautam <gautam.vivek@samsung.com>2014-11-21 19:05:46 +0530
committerFelipe Balbi <balbi@ti.com>2014-11-21 09:06:43 -0600
commit72d996fc7a01c2e4d581a15db7d001e2799ffb29 (patch)
treebefa43b8232d147fba1703864ce2842ad729695e /drivers/usb/dwc3
parentc1a3acaadde7eb260f4fd4ec87cb87d3ffeed979 (diff)
usb: dwc3: exynos: Add provision for suspend clock
DWC3 controller on Exynos SoC series have separate control for suspend clock which replaces pipe3_rx_pclk as clock source to a small part of DWC3 core that operates when SS PHY is in its lowest power state (P3) in states SS.disabled and U3. Suggested-by: Anton Tikhomirov <av.tikhomirov@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/dwc3')
-rw-r--r--drivers/usb/dwc3/dwc3-exynos.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
index 14f85a08a4cf..a1782d86a226 100644
--- a/drivers/usb/dwc3/dwc3-exynos.c
+++ b/drivers/usb/dwc3/dwc3-exynos.c
@@ -34,6 +34,8 @@ struct dwc3_exynos {
struct device *dev;
struct clk *clk;
+ struct clk *susp_clk;
+
struct regulator *vdd33;
struct regulator *vdd10;
};
@@ -140,6 +142,13 @@ static int dwc3_exynos_probe(struct platform_device *pdev)
}
clk_prepare_enable(exynos->clk);
+ exynos->susp_clk = devm_clk_get(dev, "usbdrd30_susp_clk");
+ if (IS_ERR(exynos->susp_clk)) {
+ dev_dbg(dev, "no suspend clk specified\n");
+ exynos->susp_clk = NULL;
+ }
+ clk_prepare_enable(exynos->susp_clk);
+
exynos->vdd33 = devm_regulator_get(dev, "vdd33");
if (IS_ERR(exynos->vdd33)) {
ret = PTR_ERR(exynos->vdd33);
@@ -181,6 +190,7 @@ err4:
err3:
regulator_disable(exynos->vdd33);
err2:
+ clk_disable_unprepare(exynos->susp_clk);
clk_disable_unprepare(exynos->clk);
return ret;
}
@@ -193,6 +203,7 @@ static int dwc3_exynos_remove(struct platform_device *pdev)
platform_device_unregister(exynos->usb2_phy);
platform_device_unregister(exynos->usb3_phy);
+ clk_disable_unprepare(exynos->susp_clk);
clk_disable_unprepare(exynos->clk);
regulator_disable(exynos->vdd33);