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author | Felix Kuehling <Felix.Kuehling@amd.com> | 2017-03-28 20:36:12 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2017-03-29 23:55:53 -0400 |
commit | 1866bac8970522f2fb66bc2c2ed4b6e71c0830d3 (patch) | |
tree | 409f9289a6cbbdf858362c6c1c45957cd2f11eb0 /drivers/thunderbolt | |
parent | 9ceaeeafbd1177e53395946a772a2a9c4c234887 (diff) |
drm/amdgpu: Fix multi-level page table bugs for large BOs v3
Fix the start/end address calculation for address ranges that span
multiple page directories in amdgpu_vm_alloc_levels.
Add error messages if page tables aren't found. Otherwise the page
table update would just fail silently.
v2:
* Change WARN_ON to WARN_ON_ONCE
* Move masking of high address bits to caller
* Add range-check for "from" and "to"
v3:
* Replace WARN_ON_ONCE in get_pt with pr_err in caller
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/thunderbolt')
0 files changed, 0 insertions, 0 deletions