diff options
| author | Seunghun Lee <waydi1@gmail.com> | 2014-07-31 22:30:32 +0900 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-08-01 14:50:04 -0700 |
| commit | 83f053de12db59d44ab534e7ad86a87a83936826 (patch) | |
| tree | 831ae9e9f4ab2f18d127066776fd3d0080b31eca /drivers/staging | |
| parent | 578dc59f20199c854507dd5f04839ffcaf655ce3 (diff) | |
staging: dgnc: rephrase comment
Rephrase comment to explain original intention of function.
CC: Lidza Louina <lidza.louina@gmail.com>
CC: Mark Hounschell <markh@compro.net>
Suggested-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Seunghun Lee <waydi1@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging')
| -rw-r--r-- | drivers/staging/dgnc/dgnc_cls.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/staging/dgnc/dgnc_cls.c b/drivers/staging/dgnc/dgnc_cls.c index 4b65306b22ac..5a76a8e2f6cf 100644 --- a/drivers/staging/dgnc/dgnc_cls.c +++ b/drivers/staging/dgnc/dgnc_cls.c @@ -1040,11 +1040,11 @@ static void cls_flush_uart_read(struct channel_t *ch) * For complete POSIX compatibility, we should be purging the * read FIFO in the UART here. * - * However, doing the statement below also incorrectly flushes - * write data as well as just basically trashing the FIFO. + * However, clearing the read FIFO (UART_FCR_CLEAR_RCVR) also + * incorrectly flushes write data as well as just basically trashing the + * FIFO. * - * I believe this is a BUG in this UART. - * So for now, we will leave the code #ifdef'ed out... + * Presumably, this is a bug in this UART. */ udelay(10); |