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authorSai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>2019-07-04 15:23:05 +0530
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-07-04 12:23:26 +0200
commit996cdfaf538f159f822f2619d55449c587b86cb6 (patch)
treecd76d7c44f00b1462753abdc98f371611acafc0f /drivers/staging/unisys
parent1141301c20706acd444637d7c5c6b201ad878c6e (diff)
coresight: Do not default to CPU0 for missing CPU phandle
Coresight platform support assumes that a missing "cpu" phandle defaults to CPU0. This could be problematic and unnecessarily binds components to CPU0, where they may not be. In coresight etm and cpu-debug drivers, abort the probe for such cases. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/f1955ea19c714cf64ea54ec356a9aa85f3cd17b8.1562229018.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/unisys')
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