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authorFelipe Contreras <felipe.contreras@gmail.com>2010-07-04 16:34:31 +0300
committerGreg Kroah-Hartman <gregkh@suse.de>2010-07-08 13:33:00 -0700
commit4574fae58d840d78e44ae33236899f92bfb6b4a9 (patch)
tree3ee588db8fe93030d8dff173d62124033766b5ef /drivers/staging/tidspbridge/hw
parentec528652a92e18975bb6fe3e2f4f8f927b71ec88 (diff)
staging: ti dspbridge: mmu: add hw_mmu_tlb_flush_all()
So that it can be used in more than one place. Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/tidspbridge/hw')
-rw-r--r--drivers/staging/tidspbridge/hw/hw_mmu.c6
-rw-r--r--drivers/staging/tidspbridge/hw/hw_mmu.h2
2 files changed, 8 insertions, 0 deletions
diff --git a/drivers/staging/tidspbridge/hw/hw_mmu.c b/drivers/staging/tidspbridge/hw/hw_mmu.c
index 965b65954109..e593358dcc5a 100644
--- a/drivers/staging/tidspbridge/hw/hw_mmu.c
+++ b/drivers/staging/tidspbridge/hw/hw_mmu.c
@@ -35,6 +35,7 @@
#define MMU_SMALL_PAGE_MASK 0xFFFFF000
#define MMU_LOAD_TLB 0x00000001
+#define MMU_GFLUSH 0x60
/*
* hw_mmu_page_size_t: Enumerated Type used to specify the MMU Page Size(SLSS)
@@ -585,3 +586,8 @@ static hw_status mmu_set_ram_entry(const void __iomem *baseAddress,
return status;
}
+
+void hw_mmu_tlb_flush_all(const void __iomem *base)
+{
+ __raw_writeb(1, base + MMU_GFLUSH);
+}
diff --git a/drivers/staging/tidspbridge/hw/hw_mmu.h b/drivers/staging/tidspbridge/hw/hw_mmu.h
index 9b1346802809..0436974a8d23 100644
--- a/drivers/staging/tidspbridge/hw/hw_mmu.h
+++ b/drivers/staging/tidspbridge/hw/hw_mmu.h
@@ -97,6 +97,8 @@ extern hw_status hw_mmu_pte_set(const u32 pg_tbl_va,
extern hw_status hw_mmu_pte_clear(const u32 pg_tbl_va,
u32 page_size, u32 virtualAddr);
+void hw_mmu_tlb_flush_all(const void __iomem *base);
+
static inline u32 hw_mmu_pte_addr_l1(u32 L1_base, u32 va)
{
u32 pte_addr;