diff options
author | Juston Li <juston.h.li@gmail.com> | 2015-07-14 21:14:35 -0700 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-07-14 22:52:00 -0700 |
commit | 8c11f5a2805bd2c257b706d7499ed531b6c5aa5f (patch) | |
tree | 21be153db39aa992f2d5ab57ceb6cb31cfa34e32 /drivers/staging/sm750fb/ddk750_display.c | |
parent | b68a17a2ed8285ee8679648e1cbc39202c41d9fa (diff) |
staging: sm750fb: add space before open brace
Fixes checkpatch.pl error:
ERROR: space required before the open brace '{'
Signed-off-by: Juston Li <juston.h.li@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/sm750fb/ddk750_display.c')
-rw-r--r-- | drivers/staging/sm750fb/ddk750_display.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/staging/sm750fb/ddk750_display.c b/drivers/staging/sm750fb/ddk750_display.c index 973dec30c3a0..c7171a4299a0 100644 --- a/drivers/staging/sm750fb/ddk750_display.c +++ b/drivers/staging/sm750fb/ddk750_display.c @@ -132,7 +132,7 @@ static void setDisplayControl(int ctrl, int dispState) static void waitNextVerticalSync(int ctrl, int delay) { unsigned int status; - if (!ctrl){ + if (!ctrl) { /* primary controller */ /* Do not wait when the Primary PLL is off or display control is already off. @@ -166,7 +166,7 @@ static void waitNextVerticalSync(int ctrl, int delay) while (status == SYSTEM_CTRL_PANEL_VSYNC_INACTIVE); } - }else{ + }else { /* Do not wait when the Primary PLL is off or display control is already off. This will prevent the software to wait forever. */ @@ -233,14 +233,14 @@ static void swPanelPowerSequence(int disp, int delay) void ddk750_setLogicalDispOut(disp_output_t output) { unsigned int reg; - if (output & PNL_2_USAGE){ + if (output & PNL_2_USAGE) { /* set panel path controller select */ reg = PEEK32(PANEL_DISPLAY_CTRL); reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, SELECT, (output & PNL_2_MASK)>>PNL_2_OFFSET); POKE32(PANEL_DISPLAY_CTRL, reg); } - if (output & CRT_2_USAGE){ + if (output & CRT_2_USAGE) { /* set crt path controller select */ reg = PEEK32(CRT_DISPLAY_CTRL); reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, SELECT, (output & CRT_2_MASK)>>CRT_2_OFFSET); @@ -250,17 +250,17 @@ void ddk750_setLogicalDispOut(disp_output_t output) } - if (output & PRI_TP_USAGE){ + if (output & PRI_TP_USAGE) { /* set primary timing and plane en_bit */ setDisplayControl(0, (output&PRI_TP_MASK)>>PRI_TP_OFFSET); } - if (output & SEC_TP_USAGE){ + if (output & SEC_TP_USAGE) { /* set secondary timing and plane en_bit*/ setDisplayControl(1, (output&SEC_TP_MASK)>>SEC_TP_OFFSET); } - if (output & PNL_SEQ_USAGE){ + if (output & PNL_SEQ_USAGE) { /* set panel sequence */ swPanelPowerSequence((output&PNL_SEQ_MASK)>>PNL_SEQ_OFFSET, 4); } |