diff options
| author | Michael Straube <straube.linux@gmail.com> | 2020-01-05 20:49:36 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-01-10 10:58:31 +0100 |
| commit | b4cf24cc936b1552261d7bc5557aa1d8007e5be8 (patch) | |
| tree | e60c526f22dbd6dc82505ea53289bebc36ae2cf7 /drivers/staging/rtl8188eu/hal | |
| parent | 0c5e99c920a7812411dba26667edeac5d21f8836 (diff) | |
staging: rtl8188eu: refactor rtl88eu_dm_update_rx_idle_ant()
Refactor rtl88eu_dm_update_rx_idle_ant() to reduce indentation level
and clear line over 80 characters checkpatch warnings.
Signed-off-by: Michael Straube <straube.linux@gmail.com>
Link: https://lore.kernel.org/r/20200105194936.5477-2-straube.linux@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/rtl8188eu/hal')
| -rw-r--r-- | drivers/staging/rtl8188eu/hal/odm_rtl8188e.c | 56 |
1 files changed, 29 insertions, 27 deletions
diff --git a/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c b/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c index 7bfba7692ab8..a55a0d8b9fb7 100644 --- a/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c +++ b/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c @@ -154,35 +154,37 @@ void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant) struct adapter *adapter = dm_odm->Adapter; u32 default_ant, optional_ant; - if (dm_fat_tbl->RxIdleAnt != ant) { - if (ant == MAIN_ANT) { - default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? - MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX; - optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? - AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX; - } else { - default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? - AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX; - optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? - MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX; - } + if (dm_fat_tbl->RxIdleAnt == ant) + return; - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) { - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT(5) | BIT(4) | BIT(3), default_ant); - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT(8) | BIT(7) | BIT(6), optional_ant); - phy_set_bb_reg(adapter, ODM_REG_ANTSEL_CTRL_11N, - BIT(14) | BIT(13) | BIT(12), default_ant); - phy_set_bb_reg(adapter, ODM_REG_RESP_TX_11N, - BIT(6) | BIT(7), default_ant); - } else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) { - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT(5) | BIT(4) | BIT(3), default_ant); - phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, - BIT(8) | BIT(7) | BIT(6), optional_ant); - } + if (ant == MAIN_ANT) { + default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? + MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX; + optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? + AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX; + } else { + default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? + AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX; + optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? + MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX; } + + if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) { + phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, + BIT(5) | BIT(4) | BIT(3), default_ant); + phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, + BIT(8) | BIT(7) | BIT(6), optional_ant); + phy_set_bb_reg(adapter, ODM_REG_ANTSEL_CTRL_11N, + BIT(14) | BIT(13) | BIT(12), default_ant); + phy_set_bb_reg(adapter, ODM_REG_RESP_TX_11N, + BIT(6) | BIT(7), default_ant); + } else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) { + phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, + BIT(5) | BIT(4) | BIT(3), default_ant); + phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, + BIT(8) | BIT(7) | BIT(6), optional_ant); + } + dm_fat_tbl->RxIdleAnt = ant; } |