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authorGuilherme Tadashi Maeoka <gui.maeoka@gmail.com>2019-02-09 15:17:18 -0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-02-11 10:02:50 +0100
commitd099c72d3868e54f1092ae0e9ed0d65baa22adc8 (patch)
tree594f06d6efe1b006a89334e6b359cdbf565f334c /drivers/staging/mt7621-pci
parent7ed27a09417814d27405ad1eba932a1201a2b1c0 (diff)
Staging: mt7621-pci: Fix space required coding style
Fix some space required coding style. Signed-off-by: Guilherme Tadashi Maeoka <gui.maeoka@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/mt7621-pci')
-rw-r--r--drivers/staging/mt7621-pci/pci-mt7621.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c
index 507b8c68d20b..a5c31807bb8f 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -91,7 +91,7 @@
#define PCIE_CLK_GEN_EN BIT(31)
#define PCIE_CLK_GEN_DIS 0
-#define PCIE_CLK_GEN1_DIS GENMASK(30,24)
+#define PCIE_CLK_GEN1_DIS GENMASK(30, 24)
#define PCIE_CLK_GEN1_EN (BIT(27) | BIT(25))
#define RALINK_PCI_IO_MAP_BASE 0x1e160000
#define MEMORY_BASE 0x0
@@ -529,7 +529,7 @@ static void mt7621_pcie_enable_ports(struct mt7621_pcie *pcie)
static int mt7621_pcie_init_virtual_bridges(struct mt7621_pcie *pcie)
{
u32 pcie_link_status = 0;
- u32 val= 0;
+ u32 val = 0;
struct mt7621_pcie_port *port;
list_for_each_entry(port, &pcie->ports, list) {