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authorMichael Tretter <m.tretter@pengutronix.de>2020-07-13 16:42:26 +0200
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2020-07-19 14:00:31 +0200
commitc7ce107f9d899a15e4b9c24c4839abdbef88a063 (patch)
tree84d4729168332271b04cbf5014e396cf5bc61398 /drivers/staging/media/allegro-dvt
parentc4756d8774159ef1a9a204d656589c886fcefc5b (diff)
media: allegro: set num_ref_idx using response of configured channels
The firmware decides how many reference frames shall be used und returns this information via the config blob. In order to set the number of reference frames in the PPS, the driver has to read these values from the config blob after the channel has been created in the firmware. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/staging/media/allegro-dvt')
-rw-r--r--drivers/staging/media/allegro-dvt/allegro-core.c10
-rw-r--r--drivers/staging/media/allegro-dvt/allegro-mail.c6
-rw-r--r--drivers/staging/media/allegro-dvt/allegro-mail.h5
3 files changed, 17 insertions, 4 deletions
diff --git a/drivers/staging/media/allegro-dvt/allegro-core.c b/drivers/staging/media/allegro-dvt/allegro-core.c
index 51e85cad9941..07deb5ba13dc 100644
--- a/drivers/staging/media/allegro-dvt/allegro-core.c
+++ b/drivers/staging/media/allegro-dvt/allegro-core.c
@@ -208,6 +208,9 @@ struct allegro_channel {
struct allegro_buffer config_blob;
+ unsigned int num_ref_idx_l0;
+ unsigned int num_ref_idx_l1;
+
struct v4l2_ctrl *mpeg_video_h264_profile;
struct v4l2_ctrl *mpeg_video_h264_level;
struct v4l2_ctrl *mpeg_video_h264_i_frame_qp;
@@ -1336,8 +1339,8 @@ static ssize_t allegro_h264_write_pps(struct allegro_channel *channel,
pps->entropy_coding_mode_flag = 0;
pps->bottom_field_pic_order_in_frame_present_flag = 0;
pps->num_slice_groups_minus1 = 0;
- pps->num_ref_idx_l0_default_active_minus1 = 2;
- pps->num_ref_idx_l1_default_active_minus1 = 2;
+ pps->num_ref_idx_l0_default_active_minus1 = channel->num_ref_idx_l0 - 1;
+ pps->num_ref_idx_l1_default_active_minus1 = channel->num_ref_idx_l1 - 1;
pps->weighted_pred_flag = 0;
pps->weighted_bipred_idc = 0;
pps->pic_init_qp_minus26 = 0;
@@ -1639,6 +1642,9 @@ allegro_handle_create_channel(struct allegro_dev *dev,
if (err)
goto out;
+ channel->num_ref_idx_l0 = param.num_ref_idx_l0;
+ channel->num_ref_idx_l1 = param.num_ref_idx_l1;
+
v4l2_dbg(1, debug, &dev->v4l2_dev,
"channel %d: intermediate buffers: %d x %d bytes\n",
channel->mcu_channel_id,
diff --git a/drivers/staging/media/allegro-dvt/allegro-mail.c b/drivers/staging/media/allegro-dvt/allegro-mail.c
index c55b9339f9c6..bb15de080431 100644
--- a/drivers/staging/media/allegro-dvt/allegro-mail.c
+++ b/drivers/staging/media/allegro-dvt/allegro-mail.c
@@ -173,6 +173,9 @@ ssize_t allegro_decode_config_blob(struct create_channel_param *param,
struct mcu_msg_create_channel_response *msg,
u32 *src)
{
+ param->num_ref_idx_l0 = msg->num_ref_idx_l0;
+ param->num_ref_idx_l1 = msg->num_ref_idx_l1;
+
return 0;
}
@@ -273,7 +276,8 @@ allegro_dec_create_channel(struct mcu_msg_create_channel_response *msg,
msg->user_id = src[i++];
msg->options = src[i++];
msg->num_core = src[i++];
- msg->pps_param = src[i++];
+ msg->num_ref_idx_l0 = FIELD_GET(GENMASK(7, 4), src[i]);
+ msg->num_ref_idx_l1 = FIELD_GET(GENMASK(11, 8), src[i++]);
msg->int_buffers_count = src[i++];
msg->int_buffers_size = src[i++];
msg->rec_buffers_count = src[i++];
diff --git a/drivers/staging/media/allegro-dvt/allegro-mail.h b/drivers/staging/media/allegro-dvt/allegro-mail.h
index 07ed0a8d3de3..a4d829f6f99d 100644
--- a/drivers/staging/media/allegro-dvt/allegro-mail.h
+++ b/drivers/staging/media/allegro-dvt/allegro-mail.h
@@ -55,6 +55,8 @@ struct create_channel_param {
u32 log2_max_frame_num;
u32 temporal_mvp_enable;
u32 dbf_ovr_en;
+ u32 num_ref_idx_l0;
+ u32 num_ref_idx_l1;
u32 rdo_cost_mode;
u32 lf;
u32 lf_x_tile;
@@ -127,7 +129,8 @@ struct mcu_msg_create_channel_response {
u32 user_id;
u32 options;
u32 num_core;
- u32 pps_param;
+ u32 num_ref_idx_l0;
+ u32 num_ref_idx_l1;
u32 int_buffers_count;
u32 int_buffers_size;
u32 rec_buffers_count;