diff options
| author | Denis Carikli <denis@eukrea.com> | 2014-04-07 14:44:43 +0200 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-04-26 11:23:55 +0100 |
| commit | 85de9d17c485c4196f74d45de2206d4802f8a3be (patch) | |
| tree | ea13956265cee0d8e7364842a5b8ea20f58cd9d7 /drivers/staging/imx-drm/ipuv3-crtc.c | |
| parent | c9eaa447e77efe77b7fa4c953bd62de8297fd6c5 (diff) | |
imx-drm: match ipu_di_signal_cfg's clk_pol with its description.
According to the datasheet, setting the di0_polarity_disp_clk
field in the GENERAL di register sets the output clock polarity
to active high.
Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/staging/imx-drm/ipuv3-crtc.c')
| -rw-r--r-- | drivers/staging/imx-drm/ipuv3-crtc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/staging/imx-drm/ipuv3-crtc.c b/drivers/staging/imx-drm/ipuv3-crtc.c index c48f640db006..f2c9cd040043 100644 --- a/drivers/staging/imx-drm/ipuv3-crtc.c +++ b/drivers/staging/imx-drm/ipuv3-crtc.c @@ -158,7 +158,7 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc, sig_cfg.Vsync_pol = 1; sig_cfg.enable_pol = 1; - sig_cfg.clk_pol = 1; + sig_cfg.clk_pol = 0; sig_cfg.width = mode->hdisplay; sig_cfg.height = mode->vdisplay; sig_cfg.pixel_fmt = out_pixel_fmt; |