diff options
| author | Marcelo Schmitt <marcelo.schmitt1@gmail.com> | 2019-03-16 12:07:32 -0300 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2019-04-04 20:20:13 +0100 |
| commit | a816646f08ce18e8787d241e1dbda5cbc314e5ea (patch) | |
| tree | 31319c221e50aaba57b15f843fdc2b9a076f386f /drivers/staging/iio | |
| parent | 8fce3d34d70c98cd546cdb99365659087a408e02 (diff) | |
staging: iio: ad5933: add ABI documentation
Add an ABI documentation for the ad5933 driver.
Signed-off-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/staging/iio')
| -rw-r--r-- | drivers/staging/iio/Documentation/sysfs-bus-iio-impedance-analyzer-ad5933 | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/drivers/staging/iio/Documentation/sysfs-bus-iio-impedance-analyzer-ad5933 b/drivers/staging/iio/Documentation/sysfs-bus-iio-impedance-analyzer-ad5933 deleted file mode 100644 index 79c7e88c64cd..000000000000 --- a/drivers/staging/iio/Documentation/sysfs-bus-iio-impedance-analyzer-ad5933 +++ /dev/null @@ -1,30 +0,0 @@ -What: /sys/bus/iio/devices/iio:deviceX/outY_freq_start -KernelVersion: 3.1.0 -Contact: linux-iio@vger.kernel.org -Description: - Frequency sweep start frequency in Hz. - -What: /sys/bus/iio/devices/iio:deviceX/outY_freq_increment -KernelVersion: 3.1.0 -Contact: linux-iio@vger.kernel.org -Description: - Frequency increment in Hz (step size) between consecutive - frequency points along the sweep. - -What: /sys/bus/iio/devices/iio:deviceX/outY_freq_points -KernelVersion: 3.1.0 -Contact: linux-iio@vger.kernel.org -Description: - Number of frequency points (steps) in the frequency sweep. - This value, in conjunction with the outY_freq_start and the - outY_freq_increment, determines the frequency sweep range - for the sweep operation. - -What: /sys/bus/iio/devices/iio:deviceX/outY_settling_cycles -KernelVersion: 3.1.0 -Contact: linux-iio@vger.kernel.org -Description: - Number of output excitation cycles (settling time cycles) - that are allowed to pass through the unknown impedance, - after each frequency increment, and before the ADC is triggered - to perform a conversion sequence of the response signal. |