diff options
| author | Matthijs Kooijman <matthijs@stdin.nl> | 2013-04-29 19:42:00 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-05-16 15:23:55 -0700 |
| commit | bcc5defa1a3fc7c6224248ff93d71694743ebb6a (patch) | |
| tree | ca4842b6f13faa0290037dfe99a0a9ecb036b8ba /drivers/staging/dwc2 | |
| parent | 37e1dcc25fca3f0f48da0e28fcc1c717d5fc0f91 (diff) | |
staging: dwc2: add helper variable to simplify code
Now a register is masked only in once place, instead of twice. This
makes the two uses of this value shorter so they no longer need to be
linewrapped.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/dwc2')
| -rw-r--r-- | drivers/staging/dwc2/hcd_intr.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/staging/dwc2/hcd_intr.c b/drivers/staging/dwc2/hcd_intr.c index 0eebba668399..e84f244d7886 100644 --- a/drivers/staging/dwc2/hcd_intr.c +++ b/drivers/staging/dwc2/hcd_intr.c @@ -243,6 +243,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0, u32 usbcfg; u32 prtspd; u32 hcfg; + u32 fslspclksel; u32 hfir; dev_vdbg(hsotg->dev, "%s(%p)\n", __func__, hsotg); @@ -274,6 +275,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0, } hcfg = readl(hsotg->regs + HCFG); + fslspclksel = hcfg & HCFG_FSLSPCLKSEL_MASK; if (prtspd == HPRT0_SPD_LOW_SPEED && params->host_ls_low_power_phy_clk == @@ -281,8 +283,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0, /* 6 MHZ */ dev_vdbg(hsotg->dev, "FS_PHY programming HCFG to 6 MHz\n"); - if ((hcfg & HCFG_FSLSPCLKSEL_MASK) != - HCFG_FSLSPCLKSEL_6_MHZ) { + if (fslspclksel != HCFG_FSLSPCLKSEL_6_MHZ) { hcfg &= ~HCFG_FSLSPCLKSEL_MASK; hcfg |= HCFG_FSLSPCLKSEL_6_MHZ; writel(hcfg, hsotg->regs + HCFG); @@ -292,8 +293,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0, /* 48 MHZ */ dev_vdbg(hsotg->dev, "FS_PHY programming HCFG to 48 MHz\n"); - if ((hcfg & HCFG_FSLSPCLKSEL_MASK) != - HCFG_FSLSPCLKSEL_48_MHZ) { + if (fslspclksel != HCFG_FSLSPCLKSEL_48_MHZ) { hcfg &= ~HCFG_FSLSPCLKSEL_MASK; hcfg |= HCFG_FSLSPCLKSEL_48_MHZ; writel(hcfg, hsotg->regs + HCFG); |