diff options
author | Jiri Kosina <jkosina@suse.cz> | 2013-12-19 15:08:03 +0100 |
---|---|---|
committer | Jiri Kosina <jkosina@suse.cz> | 2013-12-19 15:08:32 +0100 |
commit | e23c34bb41da65f354fb7eee04300c56ee48f60c (patch) | |
tree | 549fbe449d55273b81ef104a9755109bf4ae7817 /drivers/staging/cxt1e1/comet.c | |
parent | b481c2cb3534c85dca625973b33eba15f9af3e4c (diff) | |
parent | 319e2e3f63c348a9b66db4667efa73178e18b17d (diff) |
Merge branch 'master' into for-next
Sync with Linus' tree to be able to apply fixes on top of newer things
in tree (efi-stub).
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'drivers/staging/cxt1e1/comet.c')
-rw-r--r-- | drivers/staging/cxt1e1/comet.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/staging/cxt1e1/comet.c b/drivers/staging/cxt1e1/comet.c index d71aea541811..46a0d92173e0 100644 --- a/drivers/staging/cxt1e1/comet.c +++ b/drivers/staging/cxt1e1/comet.c @@ -145,10 +145,8 @@ void init_comet(void *ci, comet_t *comet, u_int32_t port_mode, int clockmaster, /* Enable 8 out of 10 validation */ /* t1RBOC enable(BOC:BitOriented Code) */ pci_write_32((u_int32_t *) &comet->t1_rboc_ena, 0x00); - if (isT1mode) - { - - /* IBCD cfg: aka Inband Code Detection ** loopback code length set to */ + if (isT1mode) { + /* IBCD cfg: aka Inband Code Detection ** loopback code length set to */ /* 6 bit down, 5 bit up (assert) */ pci_write_32((u_int32_t *) &comet->ibcd_cfg, 0x04); /* line loopback activate pattern */ @@ -353,7 +351,7 @@ void init_comet(void *ci, comet_t *comet, u_int32_t port_mode, int clockmaster, /* RLPS Configuration Status */ pci_write_32((u_int32_t *) &comet->rlps_cfgsts, 0x11); if (isT1mode) - /* ? */ + /* ? */ pci_write_32((u_int32_t *) &comet->rlps_alos_thresh, 0x55); else /* ? */ @@ -452,7 +450,7 @@ WrtRcvEqualizerTbl(ci_t *ci, comet_t *comet, u_int32_t *table) volatile u_int32_t value; for (ramaddr = 0; ramaddr < 256; ramaddr++) { - /*** the following lines are per Errata 7, 2.5 ***/ + /*** the following lines are per Errata 7, 2.5 ***/ { /* Set up for a read operation */ pci_write_32((u_int32_t *) &comet->rlps_eq_rwsel, 0x80); |