diff options
| author | Roland Vossen <rvossen@broadcom.com> | 2011-06-01 13:44:53 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-06-07 12:36:44 -0700 |
| commit | 6a9a25eec0b55ea45e22710a9bcaf9690cb42fe6 (patch) | |
| tree | 80614a72f1e9a0be282f0b127b8b6afcc2abfb74 /drivers/staging/brcm80211/include | |
| parent | 0a0ad7d255d6e84fb265f61ac090ff1c1e546444 (diff) | |
staging: brcm80211: replaced #ifdef __mips__ sections by W_REG_FLUSH
Code cleanup. A read-after-write construct is present in the code to ensure
write order for certain Broadcom chips. Those chips are: bcm4706, bcm4716,
bcm4717, bcm4718. All these chips contain a MIPS processor. This patch gets
rid of several #ifdef __mips__ sections by defining a new macro in a header
file. This patch does not introduce behavioral changes and is purely meant
for code cleanup. The __mips__ define will be made more specific in a future
patch.
Signed-off-by: Roland Vossen <rvossen@broadcom.com>
Reviewed-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/brcm80211/include')
| -rw-r--r-- | drivers/staging/brcm80211/include/bcmutils.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/staging/brcm80211/include/bcmutils.h b/drivers/staging/brcm80211/include/bcmutils.h index 17683f2f785f..d7f531e2b83f 100644 --- a/drivers/staging/brcm80211/include/bcmutils.h +++ b/drivers/staging/brcm80211/include/bcmutils.h @@ -366,6 +366,17 @@ extern void bcm_prpkt(const char *msg, struct sk_buff *p0); } while (0) #endif /* __BIG_ENDIAN */ +#ifdef __mips__ +/* + * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder + * transactions. As a fix, a read after write is performed on certain places + * in the code. Older chips and the newer 5357 family don't require this fix. + */ +#define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); }) +#else +#define W_REG_FLUSH(r, v) W_REG((r), (v)) +#endif /* __mips__ */ + #define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) #define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) |