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author | Thomas Gleixner <tglx@linutronix.de> | 2020-12-06 22:46:17 +0100 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2020-12-11 10:40:52 +0100 |
commit | 354c796b9270eb4780e59e3bdb83a3ae4930a832 (patch) | |
tree | 38f8f7774340d4bd208d7f00fd02a89fe9d8137a /drivers/spi/spi-zynq-qspi.c | |
parent | b0ecd8e8c5ef376777277c4c2db7de92ac59f23f (diff) |
rtc: core: Make the sync offset default more realistic
The offset which is used to steer the start of an RTC synchronization
update via rtc_set_ntp_time() is huge. The math behind this is:
tsched twrite(t2.tv_sec - 1) t2 (seconds increment)
twrite - tsched is the transport time for the write to hit the device.
t2 - twrite depends on the chip and is for most chips one second.
The rtc_set_ntp_time() calculation of tsched is:
tsched = t2 - 1sec - (t2 - twrite)
The default for the sync offset is 500ms which means that twrite - tsched
is 500ms assumed that t2 - twrite is one second.
This is 0.5 seconds off for RTCs which are directly accessible by IO writes
and probably for the majority of i2C/SPI based RTC off by an order of
magnitude. Set it to 5ms which should bring it closer to reality.
The default can be adjusted by drivers (rtc_cmos does so) and could be
adjusted further by a calibration method which is an orthogonal problem.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20201206220541.960333166@linutronix.de
Diffstat (limited to 'drivers/spi/spi-zynq-qspi.c')
0 files changed, 0 insertions, 0 deletions