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| author | Rex Zhu <Rex.Zhu@amd.com> | 2017-11-08 16:39:00 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-01-10 15:44:55 -0500 |
| commit | ad8cec7df5d4bf3b1109fabbb1d61663857045ae (patch) | |
| tree | 6825d3ca0010c12b2294fe40be084d04914302c0 /drivers/spi/spi-ep93xx.c | |
| parent | d25426495f69be24b4f7b1da1c66ba6a34e49cdd (diff) | |
drm/amd/pp: Implement get_max_high_clocks for CI/VI
v2: add table length check.
DC component expect PP to give max engine clock and
memory clock through pp_get_display_mode_validation_clocks
on DGPU as well.
This patch can fix MultiGPU-Display blank
out with 1 IGPU-4k display and 2 DGPU-two 4K
displays.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/spi/spi-ep93xx.c')
0 files changed, 0 insertions, 0 deletions