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authorThor Thayer <tthayer@opensource.altera.com>2015-03-06 17:46:32 -0600
committerMark Brown <broonie@kernel.org>2015-03-09 18:43:44 +0000
commit2306509605d3cb45b8480089af2d282600650e9e (patch)
tree8c1e900986fbb420106e08f432e3b107f1e3a8b2 /drivers/spi/spi-dw.c
parentd744f82683e8cc8b49ca8f329a289c6692a9fb06 (diff)
spi: dw-spi: Single Register read to clear IRQs
Instead of clearing the RxU, RxO, and TxO IRQs individually with 3 register reads, a single read of the ICR register will do the same thing. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-dw.c')
-rw-r--r--drivers/spi/spi-dw.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
index 2437bfcbf2f8..0f0106933b52 100644
--- a/drivers/spi/spi-dw.c
+++ b/drivers/spi/spi-dw.c
@@ -232,9 +232,7 @@ static irqreturn_t interrupt_transfer(struct dw_spi *dws)
/* Error handling */
if (irq_status & (SPI_INT_TXOI | SPI_INT_RXOI | SPI_INT_RXUI)) {
- dw_readw(dws, DW_SPI_TXOICR);
- dw_readw(dws, DW_SPI_RXOICR);
- dw_readw(dws, DW_SPI_RXUICR);
+ dw_readw(dws, DW_SPI_ICR);
int_error_stop(dws, "interrupt_transfer: fifo overrun/underrun");
return IRQ_HANDLED;
}