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| author | Thierry Reding <treding@nvidia.com> | 2015-05-04 16:44:29 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-07-16 10:38:31 +0200 |
| commit | 82df0e5e78d956ea3552f7315a4d559f657047da (patch) | |
| tree | b01c7e1679e07578760b810bb91bc03b4503f93a /drivers/soc/tegra/fuse | |
| parent | b23083a9c6829675d367b4f06a64d74ead82eb14 (diff) | |
soc/tegra: fuse: Add spare bit offset for Tegra124
The offset of the first spare bit register on Tegra124 is 0x300, but
account for the fixed offset of 0x100 in the fuse accessor.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/soc/tegra/fuse')
| -rw-r--r-- | drivers/soc/tegra/fuse/fuse-tegra30.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c index 1fb64f842e41..04e799e33ae3 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra30.c +++ b/drivers/soc/tegra/fuse/fuse-tegra30.c @@ -135,6 +135,7 @@ const struct tegra_fuse_soc tegra114_fuse_soc = { static const struct tegra_fuse_info tegra124_fuse_info = { .read = tegra30_fuse_read, .size = 0x300, + .spare = 0x200, }; const struct tegra_fuse_soc tegra124_fuse_soc = { |