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authorSebastian Reichel <sebastian.reichel@collabora.com>2021-01-27 18:40:24 +0100
committerShawn Guo <shawnguo@kernel.org>2021-03-15 12:21:48 +0800
commit1168935b962b240aeaec844855549c2e818fd965 (patch)
tree288492c4214d96f4fa54a822439da831d4e9c152 /drivers/soc/imx/soc-imx.c
parenta38fd8748464831584a19438cbb3082b5a2dab15 (diff)
soc: imx: add i.MX51/i.MX53 unique id support
i.MX51 and i.MX53 SoCs have a 64-bit SoC unique ID stored in IIM, which can be used as SoC serial number. The same feature is already implemented for i.MX6/i.MX7, so this complements support to earlier SoCs. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/soc/imx/soc-imx.c')
-rw-r--r--drivers/soc/imx/soc-imx.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/soc/imx/soc-imx.c b/drivers/soc/imx/soc-imx.c
index 01bfea1cb64a..0738c0f36792 100644
--- a/drivers/soc/imx/soc-imx.c
+++ b/drivers/soc/imx/soc-imx.c
@@ -13,6 +13,8 @@
#include <soc/imx/cpu.h>
#include <soc/imx/revision.h>
+#define IIM_UID 0x820
+
#define OCOTP_UID_H 0x420
#define OCOTP_UID_L 0x410
@@ -32,6 +34,7 @@ static int __init imx_soc_device_init(void)
u64 soc_uid = 0;
u32 val;
int ret;
+ int i;
if (of_machine_is_compatible("fsl,ls1021a"))
return 0;
@@ -68,9 +71,11 @@ static int __init imx_soc_device_init(void)
soc_id = "i.MX35";
break;
case MXC_CPU_MX51:
+ ocotp_compat = "fsl,imx51-iim";
soc_id = "i.MX51";
break;
case MXC_CPU_MX53:
+ ocotp_compat = "fsl,imx53-iim";
soc_id = "i.MX53";
break;
case MXC_CPU_IMX6SL:
@@ -153,6 +158,13 @@ static int __init imx_soc_device_init(void)
regmap_read(ocotp, OCOTP_ULP_UID_1, &val);
soc_uid <<= 16;
soc_uid |= val & 0xffff;
+ } else if (__mxc_cpu_type == MXC_CPU_MX51 ||
+ __mxc_cpu_type == MXC_CPU_MX53) {
+ for (i=0; i < 8; i++) {
+ regmap_read(ocotp, IIM_UID + i*4, &val);
+ soc_uid <<= 8;
+ soc_uid |= (val & 0xff);
+ }
} else {
regmap_read(ocotp, OCOTP_UID_H, &val);
soc_uid = val;