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authorPeng Fan <peng.fan@nxp.com>2021-05-10 12:00:45 +0800
committerShawn Guo <shawnguo@kernel.org>2021-05-27 09:01:36 +0800
commitacad945dc22efb867c0a1fa5911361bc746ec05a (patch)
tree2415f89ee213f795d39263b6ab09e307984bd2e8 /drivers/soc/imx/gpcv2.c
parenta36cc1e512e9b9152a340e34d4d7b6dd7f31de3f (diff)
soc: imx: gpcv2: move reset assert after requesting domain power up
The i.MX8MM VPU power up sequence is a bit special, it must follow: 1. request power up 2. reset assert 3. reset deassert This change in this patch will not affect other domains, because the power domain default is in asserted state, unless bootloader deassert the reset. It also applies to GPU power domain. Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/soc/imx/gpcv2.c')
-rw-r--r--drivers/soc/imx/gpcv2.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index 2490757f759d..35bbb1bc5159 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -217,8 +217,6 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
goto out_regulator_disable;
}
- reset_control_assert(domain->reset);
-
if (domain->bits.pxx) {
/* request the domain to power up */
regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ,
@@ -241,6 +239,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
GPC_PGC_CTRL_PCR);
}
+ reset_control_assert(domain->reset);
+
/* delay for reset to propagate */
udelay(5);