summaryrefslogtreecommitdiff
path: root/drivers/pinctrl/uniphier/pinctrl-uniphier.h
diff options
context:
space:
mode:
authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-07-31 15:21:09 +0900
committerLinus Walleij <linus.walleij@linaro.org>2017-08-14 15:01:00 +0200
commit4e7679834be447c3a3f91246b6d533b127386e94 (patch)
treed0e44672f4908868e156feae7078fa04079d65e0 /drivers/pinctrl/uniphier/pinctrl-uniphier.h
parent7f6ee0a5791bf78b01232c290ce548159ceebfe2 (diff)
pinctrl: uniphier: omit redundant input enable bit information
For LD11/20 SoCs (capable of per-pin input enable), the iectrl bit number matches its pin number. So, this is redundant information. Instead, we just need a flag to know if the iectrl gating exists or not. With this refactoring, 5 bits in pin data will be saved. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/uniphier/pinctrl-uniphier.h')
-rw-r--r--drivers/pinctrl/uniphier/pinctrl-uniphier.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
index b040a3b56c52..24e48e3ed048 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
@@ -25,7 +25,7 @@ struct platform_device;
/* input enable control register bit */
#define UNIPHIER_PIN_IECTRL_SHIFT 0
-#define UNIPHIER_PIN_IECTRL_BITS 8
+#define UNIPHIER_PIN_IECTRL_BITS 3
#define UNIPHIER_PIN_IECTRL_MASK ((1UL << (UNIPHIER_PIN_IECTRL_BITS)) \
- 1)
@@ -62,6 +62,7 @@ struct platform_device;
#endif
#define UNIPHIER_PIN_IECTRL_NONE (UNIPHIER_PIN_IECTRL_MASK)
+#define UNIPHIER_PIN_IECTRL_EXIST 0
/* drive control type */
enum uniphier_pin_drv_type {