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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-05-31 17:05:15 +0900 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2016-05-31 12:47:18 +0200 |
commit | 94bf176b9784e55f3f5fe1015cd9cbc168743563 (patch) | |
tree | 8a92150c9fa3f5ce1baa3272def94b5ec73e8eb7 /drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c | |
parent | 72e5706aa786f6640b229717b7d9d537058c59cf (diff) |
pinctrl: uniphier: support pin configuration in sparse pin space
Unfortunately, the pin number of the new SoC, PH1-LD11, is not
contiguous. The base frame work must be adjusted to support the new
SoC pinctrl driver. The pin_desc_get() exploits radix-tree for pin
look-up, so it works more efficiently with sparse pin space.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c')
0 files changed, 0 insertions, 0 deletions