diff options
author | Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2017-08-09 21:19:40 +0900 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-08-16 14:26:30 +0200 |
commit | afdf04c151a6f07f8b631650c96be07baf8dd7de (patch) | |
tree | 2b29839b5f16534039a11d2c03fe181aeb4343c5 /drivers/pinctrl/sh-pfc | |
parent | 656285a892ce3ea9b9397826562789c0de1f5fc0 (diff) |
pinctrl: sh-pfc: Add PORT_GP_{10,2[01]} helper macros
This follows the style of existion PORT_GP_X macros and
will be used by a follow-up patch for the r8a77995 SoC.
Extracted from the initial r8a77995 patch in the BSP by Takeshi Kihara.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/sh-pfc')
-rw-r--r-- | drivers/pinctrl/sh-pfc/sh_pfc.h | 22 |
1 files changed, 17 insertions, 5 deletions
diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h index 4376397123de..89e77e59a3dc 100644 --- a/drivers/pinctrl/sh-pfc/sh_pfc.h +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h @@ -389,9 +389,13 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info; PORT_GP_CFG_1(bank, 8, fn, sfx, cfg) #define PORT_GP_9(bank, fn, sfx) PORT_GP_CFG_9(bank, fn, sfx, 0) -#define PORT_GP_CFG_12(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_10(bank, fn, sfx, cfg) \ PORT_GP_CFG_9(bank, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 9, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 9, fn, sfx, cfg) +#define PORT_GP_10(bank, fn, sfx) PORT_GP_CFG_10(bank, fn, sfx, 0) + +#define PORT_GP_CFG_12(bank, fn, sfx, cfg) \ + PORT_GP_CFG_10(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 10, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 11, fn, sfx, cfg) #define PORT_GP_12(bank, fn, sfx) PORT_GP_CFG_12(bank, fn, sfx, 0) @@ -422,11 +426,19 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info; PORT_GP_CFG_1(bank, 17, fn, sfx, cfg) #define PORT_GP_18(bank, fn, sfx) PORT_GP_CFG_18(bank, fn, sfx, 0) -#define PORT_GP_CFG_23(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_20(bank, fn, sfx, cfg) \ PORT_GP_CFG_18(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 18, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 19, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 20, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 19, fn, sfx, cfg) +#define PORT_GP_20(bank, fn, sfx) PORT_GP_CFG_20(bank, fn, sfx, 0) + +#define PORT_GP_CFG_21(bank, fn, sfx, cfg) \ + PORT_GP_CFG_20(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 20, fn, sfx, cfg) +#define PORT_GP_21(bank, fn, sfx) PORT_GP_CFG_21(bank, fn, sfx, 0) + +#define PORT_GP_CFG_23(bank, fn, sfx, cfg) \ + PORT_GP_CFG_21(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 21, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 22, fn, sfx, cfg) #define PORT_GP_23(bank, fn, sfx) PORT_GP_CFG_23(bank, fn, sfx, 0) |