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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2013-05-22 20:15:53 -0700
committerSimon Horman <horms+renesas@verge.net.au>2013-06-05 17:18:19 +0900
commit0dcbc69e2bcf99539739f16cff56e48fb3e8229c (patch)
tree062f417c2d8bf4ddb338e93dd81df16518a0541a /drivers/pinctrl/sh-pfc
parent7f35184b3d49a5420a9f6a6e0a1238bf602c6cb1 (diff)
sh-pfc: r8a7778: add I2C pin groups
Add I2C SDA/SCL pin groups to R8A7778 PFC driver. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/pinctrl/sh-pfc')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7778.c54
1 files changed, 54 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
index 6b2c6b58aaf7..605f8ae6b70a 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
@@ -1371,6 +1371,32 @@ SCIF_PFC_CLK(hscif1_clk_a, HSCK1_A);
SCIF_PFC_PIN(hscif1_clk_b, RCAR_GP_PIN(4, 2));
SCIF_PFC_CLK(hscif1_clk_b, HSCK1_B);
+/* - I2C macro ------------------------------------------------------------- */
+#define I2C_PFC_PIN(name, args...) SH_PFC_PINS(name, args)
+#define I2C_PFC_MUX(name, sda, scl) SH_PFC_MUX2(name, sda, scl)
+
+/* - I2C1 ------------------------------------------------------------------ */
+I2C_PFC_PIN(i2c1_a, RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9));
+I2C_PFC_MUX(i2c1_a, SDA1_A, SCL1_A);
+I2C_PFC_PIN(i2c1_b, RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 18));
+I2C_PFC_MUX(i2c1_b, SDA1_B, SCL1_B);
+
+/* - I2C2 ------------------------------------------------------------------ */
+I2C_PFC_PIN(i2c2_a, PIN_NUMBER(3, 20), RCAR_GP_PIN(1, 3));
+I2C_PFC_MUX(i2c2_a, SDA2_A, SCL2_A);
+I2C_PFC_PIN(i2c2_b, RCAR_GP_PIN(0, 3), RCAR_GP_PIN(0, 4));
+I2C_PFC_MUX(i2c2_b, SDA2_B, SCL2_B);
+I2C_PFC_PIN(i2c2_c, RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16));
+I2C_PFC_MUX(i2c2_c, SDA2_C, SCL2_C);
+
+/* - I2C3 ------------------------------------------------------------------ */
+I2C_PFC_PIN(i2c3_a, RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15));
+I2C_PFC_MUX(i2c3_a, SDA3_A, SCL3_A);
+I2C_PFC_PIN(i2c3_b, RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 19));
+I2C_PFC_MUX(i2c3_b, SDA3_B, SCL3_B);
+I2C_PFC_PIN(i2c3_c, RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 23));
+I2C_PFC_MUX(i2c3_c, SDA3_C, SCL3_C);
+
/* - SCIF CLOCK ------------------------------------------------------------- */
SCIF_PFC_PIN(scif_clk, RCAR_GP_PIN(1, 16));
SCIF_PFC_CLK(scif_clk, SCIF_CLK);
@@ -1584,6 +1610,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(hscif1_ctrl_b),
SH_PFC_PIN_GROUP(hscif1_clk_a),
SH_PFC_PIN_GROUP(hscif1_clk_b),
+ SH_PFC_PIN_GROUP(i2c1_a),
+ SH_PFC_PIN_GROUP(i2c1_b),
+ SH_PFC_PIN_GROUP(i2c2_a),
+ SH_PFC_PIN_GROUP(i2c2_b),
+ SH_PFC_PIN_GROUP(i2c2_c),
+ SH_PFC_PIN_GROUP(i2c3_a),
+ SH_PFC_PIN_GROUP(i2c3_b),
+ SH_PFC_PIN_GROUP(i2c3_c),
SH_PFC_PIN_GROUP(scif_clk),
SH_PFC_PIN_GROUP(scif0_data_a),
SH_PFC_PIN_GROUP(scif0_data_b),
@@ -1676,6 +1710,23 @@ static const char * const hscif1_groups[] = {
"hscif1_clk_b",
};
+static const char * const i2c1_groups[] = {
+ "i2c1_a",
+ "i2c1_b",
+};
+
+static const char * const i2c2_groups[] = {
+ "i2c2_a",
+ "i2c2_b",
+ "i2c2_c",
+};
+
+static const char * const i2c3_groups[] = {
+ "i2c3_a",
+ "i2c3_b",
+ "i2c3_c",
+};
+
static const char * const scif_clk_groups[] = {
"scif_clk",
};
@@ -1790,6 +1841,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(ether),
SH_PFC_FUNCTION(hscif0),
SH_PFC_FUNCTION(hscif1),
+ SH_PFC_FUNCTION(i2c1),
+ SH_PFC_FUNCTION(i2c2),
+ SH_PFC_FUNCTION(i2c3),
SH_PFC_FUNCTION(scif_clk),
SH_PFC_FUNCTION(scif0),
SH_PFC_FUNCTION(scif1),