diff options
| author | Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2017-07-26 20:28:10 +0900 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-08-16 10:18:00 +0200 |
| commit | f9d130808c9aa74c34a6ed5eb536e19872065313 (patch) | |
| tree | 37ae4655a25576ac83342fd4565e8a29d531be7e /drivers/pinctrl/sh-pfc/pfc-r8a7795.c | |
| parent | bf1a8aa0a2d6b0a6d8736de7ac07c886b092cbad (diff) | |
pinctrl: sh-pfc: r8a7795: Change USB3_{OVC,PWEN} definitions
Since the latest datasheet revises the names, this patch changes
the definitions from USB3_{OVC,PWEN} to USB2_CH3_{OVC,PWEN}.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7795.c')
| -rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c index 7df11d4e853a..947abbd94e6b 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c @@ -168,8 +168,8 @@ #define GPSR5_0 F_(SCK0, IP11_27_24) /* GPSR6 */ -#define GPSR6_31 F_(USB3_OVC, IP18_7_4) -#define GPSR6_30 F_(USB3_PWEN, IP18_3_0) +#define GPSR6_31 F_(USB2_CH3_OVC, IP18_7_4) +#define GPSR6_30 F_(USB2_CH3_PWEN, IP18_3_0) #define GPSR6_29 F_(USB30_OVC, IP17_31_28) #define GPSR6_28 F_(USB30_PWEN, IP17_27_24) #define GPSR6_27 F_(USB1_OVC, IP17_23_20) @@ -361,8 +361,8 @@ #define IP17_23_20 FM(USB1_OVC) F_(0, 0) FM(MSIOF1_SS2_C) F_(0, 0) FM(SSI_WS1_A) FM(TS_SDAT0_E) FM(STP_ISD_0_E) FM(FMIN_B) FM(RIF2_SYNC_B) F_(0, 0) FM(REMOCON_B) F_(0, 0) F_(0, 0) FM(HCTS2_N_C) F_(0, 0) F_(0, 0) #define IP17_27_24 FM(USB30_PWEN) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT_B) FM(SSI_SCK2_B) FM(TS_SDEN1_D) FM(STP_ISEN_1_D) FM(STP_OPWM_0_E)FM(RIF3_D0_B) F_(0, 0) FM(TCLK2_B) FM(TPU0TO0) FM(BPFCLK_C) FM(HRTS2_N_C) F_(0, 0) F_(0, 0) #define IP17_31_28 FM(USB30_OVC) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT1_B) FM(SSI_WS2_B) FM(TS_SPSYNC1_D)FM(STP_ISSYNC_1_D) FM(STP_IVCXO27_0_E)FM(RIF3_D1_B) F_(0, 0) FM(FSO_TOE_N) FM(TPU0TO1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) -#define IP18_3_0 FM(USB3_PWEN) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT2_B) FM(SSI_SCK9_B) FM(TS_SDEN0_E) FM(STP_ISEN_0_E) F_(0, 0) FM(RIF2_D0_B) F_(0, 0) F_(0, 0) FM(TPU0TO2) F_(0, 0) FM(FMCLK_C) FM(FMCLK_D) F_(0, 0) -#define IP18_7_4 FM(USB3_OVC) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT3_B) FM(SSI_WS9_B) FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E) F_(0, 0) FM(RIF2_D1_B) F_(0, 0) F_(0, 0) FM(TPU0TO3) F_(0, 0) FM(FMIN_C) FM(FMIN_D) F_(0, 0) +#define IP18_3_0 FM(USB2_CH3_PWEN) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT2_B) FM(SSI_SCK9_B) FM(TS_SDEN0_E) FM(STP_ISEN_0_E) F_(0, 0) FM(RIF2_D0_B) F_(0, 0) F_(0, 0) FM(TPU0TO2) F_(0, 0) FM(FMCLK_C) FM(FMCLK_D) F_(0, 0) +#define IP18_7_4 FM(USB2_CH3_OVC) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT3_B) FM(SSI_WS9_B) FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E) F_(0, 0) FM(RIF2_D1_B) F_(0, 0) F_(0, 0) FM(TPU0TO3) F_(0, 0) FM(FMIN_C) FM(FMIN_D) F_(0, 0) #define PINMUX_GPSR \ \ @@ -1479,7 +1479,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_GPSR(IP17_31_28, TPU0TO1), /* IPSR18 */ - PINMUX_IPSR_GPSR(IP18_3_0, USB3_PWEN), + PINMUX_IPSR_GPSR(IP18_3_0, USB2_CH3_PWEN), PINMUX_IPSR_GPSR(IP18_3_0, AUDIO_CLKOUT2_B), PINMUX_IPSR_MSEL(IP18_3_0, SSI_SCK9_B, SEL_SSI_1), PINMUX_IPSR_MSEL(IP18_3_0, TS_SDEN0_E, SEL_TSIF0_4), @@ -1489,7 +1489,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_MSEL(IP18_3_0, FMCLK_C, SEL_FM_2), PINMUX_IPSR_MSEL(IP18_3_0, FMCLK_D, SEL_FM_3), - PINMUX_IPSR_GPSR(IP18_7_4, USB3_OVC), + PINMUX_IPSR_GPSR(IP18_7_4, USB2_CH3_OVC), PINMUX_IPSR_GPSR(IP18_7_4, AUDIO_CLKOUT3_B), PINMUX_IPSR_MSEL(IP18_7_4, SSI_WS9_B, SEL_SSI_1), PINMUX_IPSR_MSEL(IP18_7_4, TS_SPSYNC0_E, SEL_TSIF0_4), @@ -3961,8 +3961,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(6, 27), 20, 3 }, /* USB1_OVC */ { RCAR_GP_PIN(6, 28), 16, 3 }, /* USB30_PWEN */ { RCAR_GP_PIN(6, 29), 12, 3 }, /* USB30_OVC */ - { RCAR_GP_PIN(6, 30), 8, 3 }, /* USB3_PWEN */ - { RCAR_GP_PIN(6, 31), 4, 3 }, /* USB3_OVC */ + { RCAR_GP_PIN(6, 30), 8, 3 }, /* USB2_CH3_PWEN */ + { RCAR_GP_PIN(6, 31), 4, 3 }, /* USB2_CH3_OVC */ } }, { }, }; @@ -4192,8 +4192,8 @@ static const struct sh_pfc_bias_info bias_info[] = { { RCAR_GP_PIN(5, 21), PU5, 1 }, /* MSIOF0_SS2 */ { RCAR_GP_PIN(5, 20), PU5, 0 }, /* MSIOF0_TXD */ - { RCAR_GP_PIN(6, 31), PU6, 6 }, /* USB3_OVC */ - { RCAR_GP_PIN(6, 30), PU6, 5 }, /* USB3_PWEN */ + { RCAR_GP_PIN(6, 31), PU6, 6 }, /* USB2_CH3_OVC */ + { RCAR_GP_PIN(6, 30), PU6, 5 }, /* USB2_CH3_PWEN */ { RCAR_GP_PIN(6, 29), PU6, 4 }, /* USB30_OVC */ { RCAR_GP_PIN(6, 28), PU6, 3 }, /* USB30_PWEN */ { RCAR_GP_PIN(6, 27), PU6, 2 }, /* USB1_OVC */ |