diff options
| author | Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> | 2018-02-22 00:32:50 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2018-03-08 13:02:01 +0100 |
| commit | 625504aeff11eeb95f78ad9dde22d911c6839c71 (patch) | |
| tree | 013f27ceb4236f7a171882000f9b9ae362e8ade4 /drivers/pinctrl/sh-pfc/pfc-r8a7795.c | |
| parent | 661e50bc853209e41a5c14a290ca4decc43cbfd1 (diff) | |
pinctrl: sh-pfc: r8a7795: remove duplicate of CLKOUT pin in pinmux_pins[]
When adding GP-1-28 port pin support it was forgotten to remove the
CLKOUT pin from the list of pins that are not associated with a GPIO
port in pinmux_pins[]. This results in a warning when reading the
pinctrl files in sysfs as the CLKOUT pin is still added as a none GPIO
pin. Fix this by removing the duplicated entry which is no longer
needed.
~ # cat /sys/kernel/debug/pinctrl/e6060000.pin-controller/pinconf-pins
[ 89.432081] ------------[ cut here ]------------
[ 89.436904] Pin 496 is not in bias info list
[ 89.441252] WARNING: CPU: 1 PID: 456 at drivers/pinctrl/sh-pfc/core.c:408 sh_pfc_pin_to_bias_reg+0xb0/0xb8
[ 89.451002] CPU: 1 PID: 456 Comm: cat Not tainted 4.16.0-rc1-arm64-renesas-00048-gdfafc344a4f24dde #12
[ 89.460394] Hardware name: Renesas Salvator-X 2nd version board based on r8a7795 ES2.0+ (DT)
[ 89.468910] pstate: 80000085 (Nzcv daIf -PAN -UAO)
[ 89.473747] pc : sh_pfc_pin_to_bias_reg+0xb0/0xb8
[ 89.478495] lr : sh_pfc_pin_to_bias_reg+0xb0/0xb8
[ 89.483241] sp : ffff00000aff3ab0
[ 89.486587] x29: ffff00000aff3ab0 x28: ffff00000893c698
[ 89.491955] x27: ffff000008ad7d98 x26: 0000000000000000
[ 89.497323] x25: ffff8006fb3f5028 x24: ffff8006fb3f5018
[ 89.502690] x23: 0000000000000001 x22: 00000000000001f0
[ 89.508057] x21: ffff8006fb3f5018 x20: ffff000008bef000
[ 89.513423] x19: 0000000000000000 x18: ffffffffffffffff
[ 89.518790] x17: 0000000000006c4a x16: ffff000008d67c98
[ 89.524157] x15: 0000000000000001 x14: ffff00000896ca98
[ 89.529524] x13: 00000000cce5f611 x12: ffff8006f8d3b5a8
[ 89.534891] x11: ffff00000981e000 x10: ffff000008befa08
[ 89.540258] x9 : ffff8006f9b987a0 x8 : ffff000008befa08
[ 89.545625] x7 : ffff000008137094 x6 : 0000000000000000
[ 89.550991] x5 : 0000000000000000 x4 : 0000000000000001
[ 89.556357] x3 : 0000000000000007 x2 : 0000000000000007
[ 89.561723] x1 : 1ff24f80f1818600 x0 : 0000000000000000
[ 89.567091] Call trace:
[ 89.569561] sh_pfc_pin_to_bias_reg+0xb0/0xb8
[ 89.573960] r8a7795_pinmux_get_bias+0x30/0xc0
[ 89.578445] sh_pfc_pinconf_get+0x1e0/0x2d8
[ 89.582669] pin_config_get_for_pin+0x20/0x30
[ 89.587067] pinconf_generic_dump_one+0x180/0x1c8
[ 89.591815] pinconf_generic_dump_pins+0x84/0xd8
[ 89.596476] pinconf_pins_show+0xc8/0x130
[ 89.600528] seq_read+0xe4/0x510
[ 89.603789] full_proxy_read+0x60/0x90
[ 89.607576] __vfs_read+0x30/0x140
[ 89.611010] vfs_read+0x90/0x170
[ 89.614269] SyS_read+0x60/0xd8
[ 89.617443] __sys_trace_return+0x0/0x4
[ 89.621314] ---[ end trace 99c8d0d39c13e794 ]---
Fixes: 82d2de5a4f646f72 ("pinctrl: sh-pfc: r8a7795: Add GP-1-28 port pin support")
Reviewed-and-tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7795.c')
| -rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c index 18aeee592fdc..35951e7b89d2 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c @@ -1538,7 +1538,6 @@ static const struct sh_pfc_pin pinmux_pins[] = { SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, CFG_FLAGS), SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, CFG_FLAGS), SH_PFC_PIN_NAMED_CFG('C', 1, PRESETOUT#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('F', 1, CLKOUT, CFG_FLAGS), SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, CFG_FLAGS), SH_PFC_PIN_NAMED_CFG('V', 3, QSPI1_SPCLK, CFG_FLAGS), SH_PFC_PIN_NAMED_CFG('V', 5, QSPI1_SSL, CFG_FLAGS), |