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authorGeert Uytterhoeven <geert+renesas@glider.be>2019-03-21 16:17:47 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2019-05-21 11:07:29 +0200
commitbd79c92039f117a3e448b9ef042595497a5218a6 (patch)
tree4263b8d793798d032176908bcdf241f7cdb22e9b /drivers/pinctrl/sh-pfc/pfc-r8a7791.c
parent542ffc9e026a3f736eeaa041823d406510f40a12 (diff)
pinctrl: sh-pfc: Rename 2-parameter CPU_ALL_PORT() variant
There are two variants of the CPU_ALL_PORT() macro in use: 1. A three-parameter variant, to be provided for SoCs with a linear GPIO pin space ("PORT style"), 2. A two-parameter variant, to be provided for SoCs with 32-port GPIO banks ("GP port style"). Rename the 2-parameter variant to CPU_ALL_GP(), to avoid confusion, and to increase naming consistency. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7791.c')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7791.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
index 1292ec8d268f..bc9caf812fc1 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -15,7 +15,7 @@
* Pins 0-23 assigned to GPIO bank 6 can be used for SD interfaces in
* which case they support both 3.3V and 1.8V signalling.
*/
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_32(0, fn, sfx), \
PORT_GP_26(1, fn, sfx), \
PORT_GP_32(2, fn, sfx), \