diff options
| author | Ulrich Hecht <uli+renesas@fpond.eu> | 2021-01-12 17:59:10 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-01-14 12:06:15 +0100 |
| commit | 741a7370fc3b8b549ac69886be161a99109b78b6 (patch) | |
| tree | f1bba2a0598e1f94f9d4527a89f2929e846f0bf0 /drivers/pinctrl/renesas/core.c | |
| parent | 9f2af9e5613636b4717352b24ebf1041bcfc5d01 (diff) | |
pinctrl: renesas: Initial R8A779A0 (V3U) PFC support
This patch adds initial pinctrl support for the R8A779A0 (V3U) SoC,
including bias, drive strength and voltage control.
Based on patch by LUU HOAI <hoai.luu.ub@renesas.com>.
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165912.30876-5-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/renesas/core.c')
| -rw-r--r-- | drivers/pinctrl/renesas/core.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c index 979407f2cac6..2bfd3006f6fd 100644 --- a/drivers/pinctrl/renesas/core.c +++ b/drivers/pinctrl/renesas/core.c @@ -646,6 +646,12 @@ static const struct of_device_id sh_pfc_of_table[] = { .data = &r8a77995_pinmux_info, }, #endif +#ifdef CONFIG_PINCTRL_PFC_R8A779A0 + { + .compatible = "renesas,pfc-r8a779a0", + .data = &r8a779a0_pinmux_info, + }, +#endif #ifdef CONFIG_PINCTRL_PFC_SH73A0 { .compatible = "renesas,pfc-sh73a0", |