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authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>2018-03-19 17:13:14 +0900
committerLinus Walleij <linus.walleij@linaro.org>2018-03-27 15:14:43 +0200
commit4fc97ef94bbfa185d16b3e44199b7559d0668747 (patch)
tree922222a02148ea3b42cfd0e51e66c701ec670dca /drivers/pinctrl/Makefile
parentc8a830904991931106c96ff1ee0588d1ca9ea5f0 (diff)
pinctrl: uniphier: add UART hardware flow control pin-mux settings
UniPhier SoCs have the following pins for hardware flow control of UART: XRTS, XCTS and for modem control of UART: XDTR, XDSR, XDCD, XRI The port number with the flow control is SoC-dependent. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/Makefile')
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