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authorVidya Sagar <vidyas@nvidia.com>2020-12-03 12:51:10 -0600
committerBjorn Helgaas <bhelgaas@google.com>2020-12-04 12:17:04 -0600
commit2053230af11dc651ee3024682df12668496adad2 (patch)
tree18d930b9f83c6ce0b56e26ba4ce54cf5aca9e33a /drivers/pci
parent830dfe88ea37881cbb7d390e90b45611929d5943 (diff)
PCI/MSI: Set device flag indicating only 32-bit MSI support
The MSI-X Capability requires devices to support 64-bit Message Addresses, but the MSI Capability can support either 32- or 64-bit addresses. Previously, we set dev->no_64bit_msi for a few broken devices that advertise 64-bit MSI support but don't correctly support it. In addition, check the MSI "64-bit Address Capable" bit for all devices and set dev->no_64bit_msi for devices that don't advertise 64-bit support. This allows msi_verify_entries() to catch arch code defects that assign 64-bit addresses when they're not supported. The warning is helpful to find defects like the one fixed by https://lore.kernel.org/r/20201117165312.25847-1-vidyas@nvidia.com [bhelgaas: set no_64bit_msi in pci_msi_init(), commit log] Link: https://lore.kernel.org/r/20201124105035.24573-1-vidyas@nvidia.com Link: https://lore.kernel.org/r/20201203185110.1583077-4-helgaas@kernel.org Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/msi.c13
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 4c41e9ac62ec..3162f88fe940 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -623,11 +623,11 @@ static int msi_verify_entries(struct pci_dev *dev)
struct msi_desc *entry;
for_each_pci_msi_entry(entry, dev) {
- if (!dev->no_64bit_msi || !entry->msg.address_hi)
- continue;
- pci_err(dev, "Device has broken 64-bit MSI but arch"
- " tried to assign one above 4G\n");
- return -EIO;
+ if (entry->msg.address_hi && dev->no_64bit_msi) {
+ pci_err(dev, "arch assigned 64-bit MSI address %#x%08x but device only supports 32 bits\n",
+ entry->msg.address_hi, entry->msg.address_lo);
+ return -EIO;
+ }
}
return 0;
}
@@ -1619,6 +1619,9 @@ void pci_msi_init(struct pci_dev *dev)
if (ctrl & PCI_MSI_FLAGS_ENABLE)
pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS,
ctrl & ~PCI_MSI_FLAGS_ENABLE);
+
+ if (!(ctrl & PCI_MSI_FLAGS_64BIT))
+ dev->no_64bit_msi = 1;
}
void pci_msix_init(struct pci_dev *dev)