summaryrefslogtreecommitdiff
path: root/drivers/pci/dwc/pcie-designware.h
diff options
context:
space:
mode:
authorKishon Vijay Abraham I <kishon@ti.com>2017-12-19 15:25:41 +0530
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2017-12-19 11:05:44 +0000
commita134a457ed985dca8cce7ac4ea66129ea70eba73 (patch)
treeee892f45a46c94de7b7c2764af0f4a932fdeaec6 /drivers/pci/dwc/pcie-designware.h
parent35ad61921f495ee14915d185de79478c1737b4da (diff)
PCI: designware-ep: Fix ->get_msi() to check MSI_EN bit
->get_msi() now checks MSI_EN bit in the MSI CAPABILITY register to find whether the host supports MSI instead of using the MSI ADDRESS in the MSI CAPABILITY register. This fixes the issue with the following sequence 'modprobe pci_endpoint_test' enables MSI 'rmmod pci_endpoint_test' disables MSI but MSI address (in EP's capability register) has a valid value 'modprobe pci_endpoint_test no_msi=1' - Since MSI address (in EP's capability register) has a valid value (set during the previous insertion of the module), EP thinks host supports MSI. Fixes: f8aed6ec624f ("PCI: dwc: designware: Add EP mode support") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'drivers/pci/dwc/pcie-designware.h')
-rw-r--r--drivers/pci/dwc/pcie-designware.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-designware.h
index e6fd0b024b21..8700ba12c130 100644
--- a/drivers/pci/dwc/pcie-designware.h
+++ b/drivers/pci/dwc/pcie-designware.h
@@ -101,6 +101,7 @@
#define MSI_MESSAGE_CONTROL 0x52
#define MSI_CAP_MMC_SHIFT 1
#define MSI_CAP_MME_SHIFT 4
+#define MSI_CAP_MSI_EN_MASK 0x1
#define MSI_CAP_MME_MASK (7 << MSI_CAP_MME_SHIFT)
#define MSI_MESSAGE_ADDR_L32 0x54
#define MSI_MESSAGE_ADDR_U32 0x58