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authorHeiner Kallweit <hkallweit1@gmail.com>2018-06-28 20:46:45 +0200
committerDavid S. Miller <davem@davemloft.net>2018-06-30 20:46:42 +0900
commitd241d4aac93f25a48ed42c246163b6c28354b1e5 (patch)
treee8ea588dfd88d6217b156fc6f131188a08629bb2 /drivers/net
parent49d17512560b5d9384b9da1f12395be960602420 (diff)
net: phy: realtek: add support for RTL8211
In preparation of adding phylib support to the r8169 driver we need PHY drivers for all chip-internal PHY types. Fortunately almost all of them are either supported by the Realtek PHY driver already or work with the genphy driver. Still missing is support for the PHY of RTL8169s, it requires a quirk to properly support 100Mbit-fixed mode. The quirk was copied from r8169 driver which copied it from the vendor driver. Based on the PHYID the internal PHY seems to be a RTL8211. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/phy/realtek.c30
1 files changed, 30 insertions, 0 deletions
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 082fb40c656d..9757b16231f9 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -128,6 +128,28 @@ static int rtl8211f_config_intr(struct phy_device *phydev)
return phy_write_paged(phydev, 0xa42, RTL821x_INER, val);
}
+static int rtl8211_config_aneg(struct phy_device *phydev)
+{
+ int ret;
+
+ ret = genphy_config_aneg(phydev);
+ if (ret < 0)
+ return ret;
+
+ /* Quirk was copied from vendor driver. Unfortunately it includes no
+ * description of the magic numbers.
+ */
+ if (phydev->speed == SPEED_100 && phydev->autoneg == AUTONEG_DISABLE) {
+ phy_write(phydev, 0x17, 0x2138);
+ phy_write(phydev, 0x0e, 0x0260);
+ } else {
+ phy_write(phydev, 0x17, 0x2108);
+ phy_write(phydev, 0x0e, 0x0000);
+ }
+
+ return 0;
+}
+
static int rtl8211f_config_init(struct phy_device *phydev)
{
int ret;
@@ -179,6 +201,14 @@ static struct phy_driver realtek_drvs[] = {
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
}, {
+ .phy_id = 0x001cc910,
+ .name = "RTL8211 Gigabit Ethernet",
+ .phy_id_mask = 0x001fffff,
+ .features = PHY_GBIT_FEATURES,
+ .config_aneg = rtl8211_config_aneg,
+ .read_mmd = &genphy_read_mmd_unsupported,
+ .write_mmd = &genphy_write_mmd_unsupported,
+ }, {
.phy_id = 0x001cc912,
.name = "RTL8211B Gigabit Ethernet",
.phy_id_mask = 0x001fffff,