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authorGrygorii Strashko <grygorii.strashko@ti.com>2017-11-30 18:21:14 -0600
committerDavid S. Miller <davem@davemloft.net>2017-12-01 16:36:32 -0500
commitc6395f125864abbd72017514d1809dbafb492986 (patch)
treea0b0c671b734f89197de8feaf2c4d7814f2f4b71 /drivers/net
parent2733d7b89ce15d60b6409b1c2275605f3e4dc940 (diff)
net: ethernet: ti: cpsw: fix ale port numbers
TI OMAP/Sitara SoCs have fixed number of ALE ports 3, which includes Host port also. Hence, use fixed value instead of value calcualted from DT, which can be set by user and might not reflect actual HW configuration. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/ethernet/ti/cpsw.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index 2bf0bdab36df..64bdd92b2bbf 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -88,6 +88,7 @@ do { \
#define CPSW_VERSION_4 0x190112
#define HOST_PORT_NUM 0
+#define CPSW_ALE_PORTS_NUM 3
#define SLIVER_SIZE 0x40
#define CPSW1_HOST_PORT_OFFSET 0x028
@@ -3074,7 +3075,7 @@ static int cpsw_probe(struct platform_device *pdev)
ale_params.dev = &pdev->dev;
ale_params.ale_ageout = ale_ageout;
ale_params.ale_entries = data->ale_entries;
- ale_params.ale_ports = data->slaves;
+ ale_params.ale_ports = CPSW_ALE_PORTS_NUM;
cpsw->ale = cpsw_ale_create(&ale_params);
if (!cpsw->ale) {