diff options
| author | Yevgeny Petrilin <yevgenyp@mellanox.co.il> | 2008-12-29 18:38:54 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-12-29 18:38:54 -0800 |
| commit | 2d6a7b7559b47f81c50a1df91910edefff79b9b4 (patch) | |
| tree | a2c4eaedc11a992960b7db29329236cbc49b03c3 /drivers/net | |
| parent | c2b559ed8683ffb5a7bdd9e71b3803b231623c86 (diff) | |
mlx4_en: Always allocate RX ring for each interrupt vector
Removed module parameter specifying number of RX rings
Signed-off-by: Yevgeny Petrilin <yevgenyp@mellanox.co.il>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/mlx4/en_main.c | 12 | ||||
| -rw-r--r-- | drivers/net/mlx4/en_params.c | 5 |
2 files changed, 4 insertions, 13 deletions
diff --git a/drivers/net/mlx4/en_main.c b/drivers/net/mlx4/en_main.c index 34f3a191fbdf..eda72dd2120f 100644 --- a/drivers/net/mlx4/en_main.c +++ b/drivers/net/mlx4/en_main.c @@ -169,14 +169,10 @@ static void *mlx4_en_add(struct mlx4_dev *dev) mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { mlx4_info(mdev, "Using %d tx rings for port:%d\n", mdev->profile.prof[i].tx_ring_num, i); - if (!mdev->profile.prof[i].rx_ring_num) { - mdev->profile.prof[i].rx_ring_num = - min_t(int, dev->caps.num_comp_vectors, MAX_RX_RINGS); - mlx4_info(mdev, "Defaulting to %d rx rings for port:%d\n", - mdev->profile.prof[i].rx_ring_num, i); - } else - mlx4_info(mdev, "Using %d rx rings for port:%d\n", - mdev->profile.prof[i].rx_ring_num, i); + mdev->profile.prof[i].rx_ring_num = + min_t(int, dev->caps.num_comp_vectors, MAX_RX_RINGS); + mlx4_info(mdev, "Defaulting to %d rx rings for port:%d\n", + mdev->profile.prof[i].rx_ring_num, i); } /* Create our own workqueue for reset/multicast tasks diff --git a/drivers/net/mlx4/en_params.c b/drivers/net/mlx4/en_params.c index 047b37f5a747..6483ae9d45b1 100644 --- a/drivers/net/mlx4/en_params.c +++ b/drivers/net/mlx4/en_params.c @@ -65,9 +65,6 @@ MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]." MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]." " Per priority bit mask"); -MLX4_EN_PARM_INT(rx_ring_num1, 0, "Number or Rx rings for port 1 (0 = #cores)"); -MLX4_EN_PARM_INT(rx_ring_num2, 0, "Number or Rx rings for port 2 (0 = #cores)"); - MLX4_EN_PARM_INT(tx_ring_size1, MLX4_EN_AUTO_CONF, "Tx ring size for port 1"); MLX4_EN_PARM_INT(tx_ring_size2, MLX4_EN_AUTO_CONF, "Tx ring size for port 2"); MLX4_EN_PARM_INT(rx_ring_size1, MLX4_EN_AUTO_CONF, "Rx ring size for port 1"); @@ -95,8 +92,6 @@ int mlx4_en_get_profile(struct mlx4_en_dev *mdev) params->prof[1].tx_ring_num = 1; params->prof[2].tx_ring_num = 1; } - params->prof[1].rx_ring_num = min_t(int, rx_ring_num1, MAX_RX_RINGS); - params->prof[2].rx_ring_num = min_t(int, rx_ring_num2, MAX_RX_RINGS); if (tx_ring_size1 == MLX4_EN_AUTO_CONF) tx_ring_size1 = MLX4_EN_DEF_TX_RING_SIZE; |