diff options
| author | Felix Fietkau <nbd@nbd.name> | 2020-09-25 15:56:49 +0200 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2020-12-04 13:46:13 +0100 |
| commit | d22da02842e284eecd37dd5fdb2390206392e8b2 (patch) | |
| tree | 239a0fd07eb5fbf20c4adf14d684c7467869226a /drivers/net/wireless/mediatek/mt76/mt7615/regs.h | |
| parent | 3298b1f866fb410710547f5dc9cfff408b9de21d (diff) | |
mt76: mt7615: add debugfs knob for setting extended local mac addresses
This is primarily for testing and can be used in combination with monitor
mode to make the card respond to packets sent to a specific MAC address.
For now this is only exposed as a debug/testing feature, later on the
approach might be used to support more concurrent station interfaces
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'drivers/net/wireless/mediatek/mt76/mt7615/regs.h')
| -rw-r--r-- | drivers/net/wireless/mediatek/mt76/mt7615/regs.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/regs.h b/drivers/net/wireless/mediatek/mt76/mt7615/regs.h index 61623f480806..6e5db015b32c 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/regs.h +++ b/drivers/net/wireless/mediatek/mt76/mt7615/regs.h @@ -333,6 +333,9 @@ enum mt7615_reg_base { #define MT_WF_RFCR_DROP_NDPA BIT(20) #define MT_WF_RFCR_DROP_UNWANTED_CTL BIT(21) +#define MT_WF_RMAC_MORE(_band) MT_WF_RMAC((_band) ? 0x124 : 0x024) +#define MT_WF_RMAC_MORE_MUAR_MODE GENMASK(31, 30) + #define MT_WF_RFCR1(_band) MT_WF_RMAC((_band) ? 0x104 : 0x004) #define MT_WF_RFCR1_DROP_ACK BIT(4) #define MT_WF_RFCR1_DROP_BF_POLL BIT(5) @@ -342,6 +345,14 @@ enum mt7615_reg_base { #define MT_CHFREQ(_band) MT_WF_RMAC((_band) ? 0x130 : 0x030) +#define MT_WF_RMAC_MAR0 MT_WF_RMAC(0x025c) +#define MT_WF_RMAC_MAR1 MT_WF_RMAC(0x0260) +#define MT_WF_RMAC_MAR1_ADDR GENMASK(15, 0) +#define MT_WF_RMAC_MAR1_START BIT(16) +#define MT_WF_RMAC_MAR1_WRITE BIT(17) +#define MT_WF_RMAC_MAR1_IDX GENMASK(29, 24) +#define MT_WF_RMAC_MAR1_GROUP GENMASK(31, 30) + #define MT_WF_RMAC_MIB_TIME0 MT_WF_RMAC(0x03c4) #define MT_WF_RMAC_MIB_RXTIME_CLR BIT(31) #define MT_WF_RMAC_MIB_RXTIME_EN BIT(30) |