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authorYishai Hadas <yishaih@mellanox.com>2015-05-05 17:07:12 +0300
committerDavid S. Miller <davem@davemloft.net>2015-05-05 19:39:12 -0400
commit2d3c739739e64619f4846746a06ff0a6adf8a155 (patch)
tree525962c2f147a22285a41dcc9edaeb6fe63398e4 /drivers/net/ipvlan
parentcae0633872fc8b0c34930dd2862856563bce58ec (diff)
net/mlx4_core: Work properly with EQ numbers > 256 in SRIOV
The Firmware uses dynamic EQs allocation based on number of VFs and max EQs that can be allocated. As a result, VF can have EQ numbers that are larger than 256. According to the firmware spec, the max value is limited to be 1024 (10 bits), adapt the relevant code accordingly. This bug was impossible to hit prior to commit 7ae0e400cd93 ("net/mlx4_core: Flexible (asymmetric) allocation of EQs and MSI-X vectors for PF/VFs") which actually enables large number of EQs for VFs. Signed-off-by: Yishai Hadas <yishaih@mellanox.com> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ipvlan')
0 files changed, 0 insertions, 0 deletions