diff options
| author | Alex Elder <elder@linaro.org> | 2020-11-05 12:14:00 -0600 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2020-11-07 15:39:16 -0800 |
| commit | 3ca97ffd984c477e6bba26a71ebba188b99f1a4c (patch) | |
| tree | 47053977312c75032c0fde90a6f273a950e9c181 /drivers/net/ipa/gsi.c | |
| parent | 97eb94c8c79059966cedd66312e004c6070033f6 (diff) | |
net: ipa: cache last-saved GSI IRQ enabled type
Keep track of the set of GSI interrupt types that are currently
enabled by recording the mask value to write (or last written) to
the TYPE_IRQ_MSK register.
Create a new helper function gsi_irq_type_update() to handle
actually writing the register.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/net/ipa/gsi.c')
| -rw-r--r-- | drivers/net/ipa/gsi.c | 35 |
1 files changed, 23 insertions, 12 deletions
diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index 669d7496f8bd..f76b5a1e1f8d 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -230,16 +230,25 @@ static u32 gsi_channel_id(struct gsi_channel *channel) return channel - &channel->gsi->channel[0]; } +/* Update the GSI IRQ type register with the cached value */ +static void gsi_irq_type_update(struct gsi *gsi) +{ + iowrite32(gsi->type_enabled_bitmap, + gsi->virt + GSI_CNTXT_TYPE_IRQ_MSK_OFFSET); +} + /* Turn off all GSI interrupts initially */ static void gsi_irq_setup(struct gsi *gsi) { - iowrite32(0, gsi->virt + GSI_CNTXT_TYPE_IRQ_MSK_OFFSET); + gsi->type_enabled_bitmap = 0; + gsi_irq_type_update(gsi); } /* Turn off all GSI interrupts when we're all done */ static void gsi_irq_teardown(struct gsi *gsi) { - iowrite32(0, gsi->virt + GSI_CNTXT_TYPE_IRQ_MSK_OFFSET); + gsi->type_enabled_bitmap = 0; + gsi_irq_type_update(gsi); } static void gsi_irq_ieob_enable(struct gsi *gsi, u32 evt_ring_id) @@ -267,34 +276,36 @@ static void gsi_irq_enable(struct gsi *gsi) val = GENMASK(gsi->channel_count - 1, 0); iowrite32(val, gsi->virt + GSI_CNTXT_SRC_CH_IRQ_MSK_OFFSET); + gsi->type_enabled_bitmap |= BIT(GSI_CH_CTRL); val = GENMASK(gsi->evt_ring_count - 1, 0); iowrite32(val, gsi->virt + GSI_CNTXT_SRC_EV_CH_IRQ_MSK_OFFSET); + gsi->type_enabled_bitmap |= BIT(GSI_EV_CTRL); /* Each IEOB interrupt is enabled (later) as needed by channels */ iowrite32(0, gsi->virt + GSI_CNTXT_SRC_IEOB_IRQ_MSK_OFFSET); + gsi->type_enabled_bitmap |= BIT(GSI_IEOB); val = GSI_CNTXT_GLOB_IRQ_ALL; iowrite32(val, gsi->virt + GSI_CNTXT_GLOB_IRQ_EN_OFFSET); + gsi->type_enabled_bitmap |= BIT(GSI_GLOB_EE); + + /* We don't use inter-EE channel or event interrupts */ /* Never enable GSI_BREAK_POINT */ val = GSI_CNTXT_GSI_IRQ_ALL & ~BREAK_POINT_FMASK; iowrite32(val, gsi->virt + GSI_CNTXT_GSI_IRQ_EN_OFFSET); + gsi->type_enabled_bitmap |= BIT(GSI_GENERAL); - /* Finally enable the interrupt types we use */ - val = BIT(GSI_CH_CTRL); - val |= BIT(GSI_EV_CTRL); - val |= BIT(GSI_GLOB_EE); - val |= BIT(GSI_IEOB); - /* We don't use inter-EE channel or event interrupts */ - val |= BIT(GSI_GENERAL); - iowrite32(val, gsi->virt + GSI_CNTXT_TYPE_IRQ_MSK_OFFSET); + /* Finally update the interrupt types we want enabled */ + gsi_irq_type_update(gsi); } -/* Disable all GSI_interrupt types */ +/* Disable all GSI interrupt types */ static void gsi_irq_disable(struct gsi *gsi) { - iowrite32(0, gsi->virt + GSI_CNTXT_TYPE_IRQ_MSK_OFFSET); + gsi->type_enabled_bitmap = 0; + gsi_irq_type_update(gsi); iowrite32(0, gsi->virt + GSI_CNTXT_GSI_IRQ_EN_OFFSET); iowrite32(0, gsi->virt + GSI_CNTXT_GLOB_IRQ_EN_OFFSET); |