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authorIvan Khoronzhuk <ivan.khoronzhuk@linaro.org>2018-07-06 21:44:45 +0300
committerDavid S. Miller <davem@davemloft.net>2018-07-07 21:22:57 +0900
commit1c0e8123e32a048a6c79435704c77d9e04ec5a1b (patch)
tree4a879f1d9154a594da1af97ccff4b5888fa24c1a /drivers/net/ethernet/ti/cpsw.c
parent1239a96a8fcbdaa5e4171db12ccc694027a20ee7 (diff)
net: ethernet: ti: cpsw: allow PTP 224.0.0.107 to be timestamped
Tested on AM572x with cpsw v1.15 for PTP sync and delay_req messages. It doesn't work on cpsw v1.12, so added only for cpsw v > 1.15. Command for testing: ptp4l -P -4 -H -i eth0 -l 6 -m -q -p /dev/ptp0 -f ptp.cfg where ptp.cfg: [global] tx_timestamp_timeout 20 Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/ti/cpsw.c')
-rw-r--r--drivers/net/ethernet/ti/cpsw.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index f355e65323f3..00761fe59848 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -257,6 +257,7 @@ struct cpsw_ss_regs {
#define VLAN_LTYPE2_EN BIT(21) /* VLAN LTYPE 2 enable */
#define VLAN_LTYPE1_EN BIT(20) /* VLAN LTYPE 1 enable */
#define DSCP_PRI_EN BIT(16) /* DSCP Priority Enable */
+#define TS_107 BIT(15) /* Tyme Sync Dest IP Address 107 */
#define TS_320 BIT(14) /* Time Sync Dest Port 320 enable */
#define TS_319 BIT(13) /* Time Sync Dest Port 319 enable */
#define TS_132 BIT(12) /* Time Sync Dest IP Addr 132 enable */
@@ -281,7 +282,7 @@ struct cpsw_ss_regs {
#define CTRL_V3_TS_BITS \
- (TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\
+ (TS_107 | TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\
TS_TTL_NONZERO | TS_ANNEX_F_EN | TS_ANNEX_D_EN |\
TS_LTYPE1_EN)