diff options
author | Alexander Duyck <alexander.h.duyck@intel.com> | 2017-02-06 18:25:26 -0800 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2017-03-17 12:11:43 -0700 |
commit | 7bd175928280c3e5d741cb9948cffaa61b7cc7c6 (patch) | |
tree | 2b698687a870115e62e1cf74a553ecb51e397e08 /drivers/net/ethernet/intel/igb/igb.h | |
parent | fe723dff0fa4181ddb8116e72bc67d00d4239cb6 (diff) |
igb: Add support for DMA_ATTR_WEAK_ORDERING
Since we are already using DMA attributes in igb for Rx there is no reason
why we can't also apply DMA_ATTR_WEAK_ORDERING which is needed on some
platforms to improve performance.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/igb/igb.h')
-rw-r--r-- | drivers/net/ethernet/intel/igb/igb.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h index acbc3abe2ddd..87c9fe9d6f18 100644 --- a/drivers/net/ethernet/intel/igb/igb.h +++ b/drivers/net/ethernet/intel/igb/igb.h @@ -148,6 +148,9 @@ struct vf_data_storage { /* How many Rx Buffers do we bundle into one write to the hardware ? */ #define IGB_RX_BUFFER_WRITE 16 /* Must be power of 2 */ +#define IGB_RX_DMA_ATTR \ + (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING) + #define AUTO_ALL_MODES 0 #define IGB_EEPROM_APME 0x0400 |