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authorBruce Allan <bruce.w.allan@intel.com>2013-01-04 09:53:19 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2013-01-27 01:40:38 -0800
commit4e03510b4779851db7e9153368d1f856e66ea239 (patch)
treead63dcd41c095ea4af0a50cb19d50b4ad85cc15d /drivers/net/ethernet/intel/e1000e/ich8lan.c
parented1a42656aa794aa3d6edf5ca83f98835701dc41 (diff)
e1000e: fix PHY init workarounds for i217/i218
Toggling the LANPHYPC Value bit cycles the power on the PHY and sets it back to power-on defaults. This includes setting it's MAC-PHY messaging mode to use the PCIe-like interconnect, so the MAC must also be set back from SMBus mode to PCIe mode otherwise the PHY can be inaccessible. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/e1000e/ich8lan.c')
-rw-r--r--drivers/net/ethernet/intel/e1000e/ich8lan.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
index e0f41f0b5fe6..3f3477ffd46c 100644
--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
@@ -426,6 +426,15 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
mac_reg |= E1000_FEXTNVM3_PHY_CFG_COUNTER_50MSEC;
ew32(FEXTNVM3, mac_reg);
+ if (hw->mac.type == e1000_pch_lpt) {
+ /* Toggling LANPHYPC brings the PHY out of SMBus mode
+ * So ensure that the MAC is also out of SMBus mode
+ */
+ mac_reg = er32(CTRL_EXT);
+ mac_reg &= ~E1000_CTRL_EXT_FORCE_SMBUS;
+ ew32(CTRL_EXT, mac_reg);
+ }
+
/* Toggle LANPHYPC Value bit */
mac_reg = er32(CTRL);
mac_reg |= E1000_CTRL_LANPHYPC_OVERRIDE;